1 | /* $NetBSD: qsphyreg.h,v 1.4 2008/04/28 20:23:53 martin Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 1998 The NetBSD Foundation, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, |
9 | * NASA Ames Research Center. |
10 | * |
11 | * Redistribution and use in source and binary forms, with or without |
12 | * modification, are permitted provided that the following conditions |
13 | * are met: |
14 | * 1. Redistributions of source code must retain the above copyright |
15 | * notice, this list of conditions and the following disclaimer. |
16 | * 2. Redistributions in binary form must reproduce the above copyright |
17 | * notice, this list of conditions and the following disclaimer in the |
18 | * documentation and/or other materials provided with the distribution. |
19 | * |
20 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
21 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
22 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
24 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
25 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
26 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
27 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
28 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
29 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
30 | * POSSIBILITY OF SUCH DAMAGE. |
31 | */ |
32 | |
33 | #ifndef _DEV_MII_QSPHYREG_H_ |
34 | #define _DEV_MII_QSPHYREG_H_ |
35 | |
36 | /* |
37 | * QS6612 registers. |
38 | */ |
39 | |
40 | #define MII_QSPHY_MCTL 0x11 /* Mode control */ |
41 | #define MCTL_T4PRE 0x1000 /* 100baseT4 interface present */ |
42 | #define MCTL_BTEXT 0x0800 /* reduce 10baseT squelch level */ |
43 | #define MCTL_FACTTEST 0x0100 /* factory test mode */ |
44 | #define MCTL_PHYADDRMASK 0x00f8 /* PHY address */ |
45 | #define MCTL_FACTTEST2 0x0004 /* another factory test mode */ |
46 | #define MCTL_NLPDIS 0x0002 /* disable link pulse tx */ |
47 | #define MCTL_SQEDIS 0x0001 /* disable SQE */ |
48 | |
49 | #define MII_QSPHY_ISRC 0x1d /* Interrupt source */ |
50 | #define MII_QSPHY_IMASK 0x1e /* Interrupt mask */ |
51 | #define IMASK_TLINTR 0x8000 /* ThunderLAN interrupt mode */ |
52 | #define IMASK_ANCPL 0x0040 /* autonegotiation complete */ |
53 | #define IMASK_RFD 0x0020 /* remote fault detected */ |
54 | #define IMASK_LD 0x0010 /* link down */ |
55 | #define IMASK_ANLPA 0x0008 /* autonegotiation LP ACK */ |
56 | #define IMASK_PDT 0x0004 /* parallel detection fault */ |
57 | #define IMASK_ANPR 0x0002 /* autonegotiation page received */ |
58 | #define IMASK_REF 0x0001 /* receive error counter full */ |
59 | |
60 | #define MII_QSPHY_PCTL 0x1f /* PHY control */ |
61 | #define PCTL_RXERDIS 0x2000 /* receive error counter disable */ |
62 | #define PCTL_ANC 0x1000 /* autonegotiation complete */ |
63 | #define PCTL_RLBEN 0x0200 /* remote loopback enable */ |
64 | #define PCTL_DCREN 0x0100 /* DC restoration enable */ |
65 | #define PCTL_4B5BEN 0x0040 /* 4b/5b encoding */ |
66 | #define PCTL_PHYISO 0x0020 /* isolate PHY */ |
67 | #define PCTL_OPMASK 0x001c /* operation mode mask */ |
68 | #define PCTL_AN 0x0000 /* autonegotiation in-progress */ |
69 | #define PCTL_10_T 0x0004 /* 10baseT */ |
70 | #define PCTL_100_TX 0x0008 /* 100baseTX */ |
71 | #define PCTL_100_T4 0x0010 /* 100baseT4 */ |
72 | #define PCTL_10_T_FDX 0x0014 /* 10baseT-FDX */ |
73 | #define PCTL_100_TX_FDX 0x0018 /* 100baseTX-FDX */ |
74 | #define PCTL_MLT3DIS 0x0002 /* disable MLT3 */ |
75 | #define PCTL_SRCDIS 0x0001 /* disable scrambling */ |
76 | |
77 | #endif /* _DEV_MII_QSPHYREG_H_ */ |
78 | |