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/tmp/gdb-13.1/gdb/aarch64-linux-nat.c
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1/* Native-dependent code for GNU/Linux AArch64.
2
3 Copyright (C) 2011-2023 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21#include "defs.h"
22
23#include "inferior.h"
24#include "gdbcore.h"
25#include "regcache.h"
26#include "linux-nat.h"
27#include "target-descriptions.h"
28#include "auxv.h"
29#include "gdbcmd.h"
30#include "aarch64-nat.h"
31#include "aarch64-tdep.h"
32#include "aarch64-linux-tdep.h"
33#include "aarch32-linux-nat.h"
34#include "aarch32-tdep.h"
35#include "arch/arm.h"
36#include "nat/aarch64-linux.h"
39
40#include "elf/external.h"
41#include "elf/common.h"
42
43#include "nat/gdb_ptrace.h"
44#include <sys/utsname.h>
45#include <asm/ptrace.h>
46
47#include "gregset.h"
48#include "linux-tdep.h"
49#include "arm-tdep.h"
50
51/* Defines ps_err_e, struct ps_prochandle. */
52#include "gdb_proc_service.h"
53#include "arch-utils.h"
54
56
58
59#ifndef TRAP_HWBKPT
60#define TRAP_HWBKPT 0x0004
61#endif
62
64 : public aarch64_nat_target<linux_nat_target>
65{
66public:
67 /* Add our register access methods. */
68 void fetch_registers (struct regcache *, int) override;
69 void store_registers (struct regcache *, int) override;
70
71 const struct target_desc *read_description () override;
72
73 /* Add our hardware breakpoint and watchpoint implementation. */
74 bool stopped_by_watchpoint () override;
75 bool stopped_data_address (CORE_ADDR *) override;
76
77 int can_do_single_step () override;
78
79 /* Override the GNU/Linux inferior startup hook. */
80 void post_startup_inferior (ptid_t) override;
81
82 /* Override the GNU/Linux post attach hook. */
83 void post_attach (int pid) override;
84
85 /* These three defer to common nat/ code. */
86 void low_new_thread (struct lwp_info *lp) override
88 void low_delete_thread (struct arch_lwp_info *lp) override
90 void low_prepare_to_resume (struct lwp_info *lp) override
92
93 void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
94 void low_forget_process (pid_t pid) override;
95
96 /* Add our siginfo layout converter. */
97 bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
98 override;
99
100 struct gdbarch *thread_architecture (ptid_t) override;
101
102 bool supports_memory_tagging () override;
103
104 /* Read memory allocation tags from memory via PTRACE. */
105 bool fetch_memtags (CORE_ADDR address, size_t len,
106 gdb::byte_vector &tags, int type) override;
107
108 /* Write allocation tags to memory via PTRACE. */
109 bool store_memtags (CORE_ADDR address, size_t len,
110 const gdb::byte_vector &tags, int type) override;
111};
112
114
115/* Called whenever GDB is no longer debugging process PID. It deletes
116 data structures that keep track of debug register state. */
117
118void
120{
122}
123
124/* Fill GDB's register array with the general-purpose register values
125 from the current thread. */
126
127static void
129{
130 int ret, tid;
131 struct gdbarch *gdbarch = regcache->arch ();
132 elf_gregset_t regs;
133 struct iovec iovec;
134
135 /* Make sure REGS can hold all registers contents on both aarch64
136 and arm. */
137 gdb_static_assert (sizeof (regs) >= 18 * 4);
138
139 tid = regcache->ptid ().lwp ();
140
141 iovec.iov_base = &regs;
142 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
143 iovec.iov_len = 18 * 4;
144 else
145 iovec.iov_len = sizeof (regs);
146
147 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
148 if (ret < 0)
149 perror_with_name (_("Unable to fetch general registers"));
150
151 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
152 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
153 else
154 {
155 int regno;
156
157 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
158 regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
159 }
160}
161
162/* Store to the current thread the valid general-purpose register
163 values in the GDB's register array. */
164
165static void
167{
168 int ret, tid;
169 elf_gregset_t regs;
170 struct iovec iovec;
171 struct gdbarch *gdbarch = regcache->arch ();
172
173 /* Make sure REGS can hold all registers contents on both aarch64
174 and arm. */
175 gdb_static_assert (sizeof (regs) >= 18 * 4);
176 tid = regcache->ptid ().lwp ();
177
178 iovec.iov_base = &regs;
179 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
180 iovec.iov_len = 18 * 4;
181 else
182 iovec.iov_len = sizeof (regs);
183
184 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
185 if (ret < 0)
186 perror_with_name (_("Unable to fetch general registers"));
187
188 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
189 aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
190 else
191 {
192 int regno;
193
194 for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
195 if (REG_VALID == regcache->get_register_status (regno))
196 regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
197 }
198
199 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
200 if (ret < 0)
201 perror_with_name (_("Unable to store general registers"));
202}
203
204/* Fill GDB's register array with the fp/simd register values
205 from the current thread. */
206
207static void
209{
210 int ret, tid;
211 elf_fpregset_t regs;
212 struct iovec iovec;
213 struct gdbarch *gdbarch = regcache->arch ();
214
215 /* Make sure REGS can hold all VFP registers contents on both aarch64
216 and arm. */
217 gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
218
219 tid = regcache->ptid ().lwp ();
220
221 iovec.iov_base = &regs;
222
223 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
224 {
225 iovec.iov_len = ARM_VFP3_REGS_SIZE;
226
227 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
228 if (ret < 0)
229 perror_with_name (_("Unable to fetch VFP registers"));
230
231 aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
232 }
233 else
234 {
235 int regno;
236
237 iovec.iov_len = sizeof (regs);
238
239 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
240 if (ret < 0)
241 perror_with_name (_("Unable to fetch vFP/SIMD registers"));
242
243 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
244 regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
245
248 }
249}
250
251/* Store to the current thread the valid fp/simd register
252 values in the GDB's register array. */
253
254static void
256{
257 int ret, tid;
258 elf_fpregset_t regs;
259 struct iovec iovec;
260 struct gdbarch *gdbarch = regcache->arch ();
261
262 /* Make sure REGS can hold all VFP registers contents on both aarch64
263 and arm. */
264 gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
265 tid = regcache->ptid ().lwp ();
266
267 iovec.iov_base = &regs;
268
269 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
270 {
271 iovec.iov_len = ARM_VFP3_REGS_SIZE;
272
273 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
274 if (ret < 0)
275 perror_with_name (_("Unable to fetch VFP registers"));
276
277 aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
278 }
279 else
280 {
281 int regno;
282
283 iovec.iov_len = sizeof (regs);
284
285 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
286 if (ret < 0)
287 perror_with_name (_("Unable to fetch FP/SIMD registers"));
288
289 for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
290 if (REG_VALID == regcache->get_register_status (regno))
292 (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
293
295 regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
297 regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
298 }
299
300 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
301 {
302 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
303 if (ret < 0)
304 perror_with_name (_("Unable to store VFP registers"));
305 }
306 else
307 {
308 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
309 if (ret < 0)
310 perror_with_name (_("Unable to store FP/SIMD registers"));
311 }
312}
313
314/* Fill GDB's register array with the sve register values
315 from the current thread. */
316
317static void
319{
320 std::unique_ptr<gdb_byte[]> base
323}
324
325/* Store to the current thread the valid sve register
326 values in the GDB's register array. */
327
328static void
330{
331 int ret;
332 struct iovec iovec;
333 int tid = regcache->ptid ().lwp ();
334
335 /* First store vector length to the thread. This is done first to ensure the
336 ptrace buffers read from the kernel are the correct size. */
337 if (!aarch64_sve_set_vq (tid, regcache))
338 perror_with_name (_("Unable to set VG register"));
339
340 /* Obtain a dump of SVE registers from ptrace. */
341 std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
342
343 /* Overwrite with regcache state. */
345
346 /* Write back to the kernel. */
347 iovec.iov_base = base.get ();
348 iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
349 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
350
351 if (ret < 0)
352 perror_with_name (_("Unable to store sve registers"));
353}
354
355/* Fill GDB's register array with the pointer authentication mask values from
356 the current thread. */
357
358static void
360{
362 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
363 int ret;
364 struct iovec iovec;
365 uint64_t pauth_regset[2] = {0, 0};
366 int tid = regcache->ptid ().lwp ();
367
368 iovec.iov_base = &pauth_regset;
369 iovec.iov_len = sizeof (pauth_regset);
370
371 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_PAC_MASK, &iovec);
372 if (ret != 0)
373 perror_with_name (_("unable to fetch pauth registers"));
374
376 &pauth_regset[0]);
378 &pauth_regset[1]);
379}
380
381/* Fill GDB's register array with the MTE register values from
382 the current thread. */
383
384static void
386{
388 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
389 int regno = tdep->mte_reg_base;
390
391 gdb_assert (regno != -1);
392
393 uint64_t tag_ctl = 0;
394 struct iovec iovec;
395
396 iovec.iov_base = &tag_ctl;
397 iovec.iov_len = sizeof (tag_ctl);
398
399 int tid = get_ptrace_pid (regcache->ptid ());
400 if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
401 perror_with_name (_("unable to fetch MTE registers"));
402
403 regcache->raw_supply (regno, &tag_ctl);
404}
405
406/* Store to the current thread the valid MTE register set in the GDB's
407 register array. */
408
409static void
411{
413 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
414 int regno = tdep->mte_reg_base;
415
416 gdb_assert (regno != -1);
417
418 uint64_t tag_ctl = 0;
419
420 if (REG_VALID != regcache->get_register_status (regno))
421 return;
422
423 regcache->raw_collect (regno, (char *) &tag_ctl);
424
425 struct iovec iovec;
426
427 iovec.iov_base = &tag_ctl;
428 iovec.iov_len = sizeof (tag_ctl);
429
430 int tid = get_ptrace_pid (regcache->ptid ());
431 if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TAGGED_ADDR_CTRL, &iovec) != 0)
432 perror_with_name (_("unable to store MTE registers"));
433}
434
435/* Fill GDB's register array with the TLS register values from
436 the current thread. */
437
438static void
440{
442 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
443 int regno = tdep->tls_regnum_base;
444
445 gdb_assert (regno != -1);
446 gdb_assert (tdep->tls_register_count > 0);
447
448 uint64_t tpidrs[tdep->tls_register_count] = { 0 };
449 struct iovec iovec;
450 iovec.iov_base = tpidrs;
451 iovec.iov_len = sizeof (tpidrs);
452
453 int tid = get_ptrace_pid (regcache->ptid ());
454 if (ptrace (PTRACE_GETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
455 perror_with_name (_("unable to fetch TLS registers"));
456
457 for (int i = 0; i < tdep->tls_register_count; i++)
458 regcache->raw_supply (regno + i, &tpidrs[i]);
459}
460
461/* Store to the current thread the valid TLS register set in GDB's
462 register array. */
463
464static void
466{
468 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
469 int regno = tdep->tls_regnum_base;
470
471 gdb_assert (regno != -1);
472 gdb_assert (tdep->tls_register_count > 0);
473
474 uint64_t tpidrs[tdep->tls_register_count] = { 0 };
475
476 for (int i = 0; i < tdep->tls_register_count; i++)
477 {
478 if (REG_VALID != regcache->get_register_status (regno + i))
479 continue;
480
481 regcache->raw_collect (regno + i, (char *) &tpidrs[i]);
482 }
483
484 struct iovec iovec;
485 iovec.iov_base = &tpidrs;
486 iovec.iov_len = sizeof (tpidrs);
487
488 int tid = get_ptrace_pid (regcache->ptid ());
489 if (ptrace (PTRACE_SETREGSET, tid, NT_ARM_TLS, &iovec) != 0)
490 perror_with_name (_("unable to store TLS register"));
491}
492
493/* The AArch64 version of the "fetch_registers" target_ops method. Fetch
494 REGNO from the target and place the result into REGCACHE. */
495
496static void
498{
500 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
501
502 if (regno == -1)
503 {
505 if (tdep->has_sve ())
507 else
509
510 if (tdep->has_pauth ())
512
513 if (tdep->has_mte ())
515
516 if (tdep->has_tls ())
518 }
519 else if (regno < AARCH64_V0_REGNUM)
521 else if (tdep->has_sve ())
523 else
525
526 if (tdep->has_pauth ())
527 {
528 if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
529 || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
531 }
532
533 /* Fetch individual MTE registers. */
534 if (tdep->has_mte ()
535 && (regno == tdep->mte_reg_base))
537
538 if (tdep->has_tls ()
539 && regno >= tdep->tls_regnum_base
540 && regno < tdep->tls_regnum_base + tdep->tls_register_count)
542}
543
544/* A version of the "fetch_registers" target_ops method used when running
545 32-bit ARM code on an AArch64 target. Fetch REGNO from the target and
546 place the result into REGCACHE. */
547
548static void
550{
551 arm_gdbarch_tdep *tdep
552 = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
553
554 if (regno == -1)
555 {
557 if (tdep->vfp_register_count > 0)
559 }
560 else if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
562 else if (tdep->vfp_register_count > 0
563 && regno >= ARM_D0_REGNUM
564 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
565 || regno == ARM_FPSCR_REGNUM))
567}
568
569/* Implement the "fetch_registers" target_ops method. */
570
571void
573 int regno)
574{
575 if (gdbarch_bfd_arch_info (regcache->arch ())->bits_per_word == 32)
577 else
579}
580
581/* The AArch64 version of the "store_registers" target_ops method. Copy
582 the value of register REGNO from REGCACHE into the the target. */
583
584static void
586{
588 = gdbarch_tdep<aarch64_gdbarch_tdep> (regcache->arch ());
589
590 if (regno == -1)
591 {
593 if (tdep->has_sve ())
595 else
597
598 if (tdep->has_mte ())
600
601 if (tdep->has_tls ())
603 }
604 else if (regno < AARCH64_V0_REGNUM)
606 else if (tdep->has_sve ())
608 else
610
611 /* Store MTE registers. */
612 if (tdep->has_mte ()
613 && (regno == tdep->mte_reg_base))
615
616 if (tdep->has_tls ()
617 && regno >= tdep->tls_regnum_base
618 && regno < tdep->tls_regnum_base + tdep->tls_register_count)
620}
621
622/* A version of the "store_registers" target_ops method used when running
623 32-bit ARM code on an AArch64 target. Copy the value of register REGNO
624 from REGCACHE into the the target. */
625
626static void
628{
629 arm_gdbarch_tdep *tdep
630 = gdbarch_tdep<arm_gdbarch_tdep> (regcache->arch ());
631
632 if (regno == -1)
633 {
635 if (tdep->vfp_register_count > 0)
637 }
638 else if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
640 else if (tdep->vfp_register_count > 0
641 && regno >= ARM_D0_REGNUM
642 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
643 || regno == ARM_FPSCR_REGNUM))
645}
646
647/* Implement the "store_registers" target_ops method. */
648
649void
651 int regno)
652{
653 if (gdbarch_bfd_arch_info (regcache->arch ())->bits_per_word == 32)
655 else
657}
658
659/* Fill register REGNO (if it is a general-purpose register) in
660 *GREGSETPS with the value in GDB's register array. If REGNO is -1,
661 do this for all registers. */
662
663void
665 gdb_gregset_t *gregsetp, int regno)
666{
668 regno, (gdb_byte *) gregsetp,
670}
671
672/* Fill GDB's register array with the general-purpose register values
673 in *GREGSETP. */
674
675void
677{
679 (const gdb_byte *) gregsetp,
681}
682
683/* Fill register REGNO (if it is a floating-point register) in
684 *FPREGSETP with the value in GDB's register array. If REGNO is -1,
685 do this for all registers. */
686
687void
689 gdb_fpregset_t *fpregsetp, int regno)
690{
692 regno, (gdb_byte *) fpregsetp,
694}
695
696/* Fill GDB's register array with the floating-point register values
697 in *FPREGSETP. */
698
699void
701{
703 (const gdb_byte *) fpregsetp,
705}
706
707/* linux_nat_new_fork hook. */
708
709void
711 pid_t child_pid)
712{
713 pid_t parent_pid;
714 struct aarch64_debug_reg_state *parent_state;
715 struct aarch64_debug_reg_state *child_state;
716
717 /* NULL means no watchpoint has ever been set in the parent. In
718 that case, there's nothing to do. */
719 if (parent->arch_private == NULL)
720 return;
721
722 /* GDB core assumes the child inherits the watchpoints/hw
723 breakpoints of the parent, and will remove them all from the
724 forked off process. Copy the debug registers mirrors into the
725 new process so that all breakpoints and watchpoints can be
726 removed together. */
727
728 parent_pid = parent->ptid.pid ();
729 parent_state = aarch64_get_debug_reg_state (parent_pid);
730 child_state = aarch64_get_debug_reg_state (child_pid);
731 *child_state = *parent_state;
732}
733
734
735/* Called by libthread_db. Returns a pointer to the thread local
736 storage (or its descriptor). */
737
738ps_err_e
740 lwpid_t lwpid, int idx, void **base)
741{
742 int is_64bit_p
743 = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
744
745 return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
746}
747
748
749/* Implement the virtual inf_ptrace_target::post_startup_inferior method. */
750
751void
753{
754 low_forget_process (ptid.pid ());
757}
758
759/* Implement the "post_attach" target_ops method. */
760
761void
763{
765 /* Set the hardware debug register capacity. If
766 aarch64_linux_get_debug_reg_capacity is not called
767 (as it is in aarch64_linux_child_post_startup_inferior) then
768 software watchpoints will be used instead of hardware
769 watchpoints when attaching to a target. */
772}
773
774/* Implement the "read_description" target_ops method. */
775
776const struct target_desc *
778{
779 int ret, tid;
780 gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
781 struct iovec iovec;
782
783 tid = inferior_ptid.pid ();
784
785 iovec.iov_base = regbuf;
786 iovec.iov_len = ARM_VFP3_REGS_SIZE;
787
788 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
789 if (ret == 0)
790 return aarch32_read_description ();
791
792 CORE_ADDR hwcap = linux_get_hwcap ();
793 CORE_ADDR hwcap2 = linux_get_hwcap2 ();
794
795 aarch64_features features;
796 features.vq = aarch64_sve_get_vq (tid);
797 features.pauth = hwcap & AARCH64_HWCAP_PACA;
798 features.mte = hwcap2 & HWCAP2_MTE;
799 features.tls = aarch64_tls_register_count (tid);
800
801 return aarch64_read_description (features);
802}
803
804/* Convert a native/host siginfo object, into/from the siginfo in the
805 layout of the inferiors' architecture. Returns true if any
806 conversion was done; false otherwise. If DIRECTION is 1, then copy
807 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
808 INF. */
809
810bool
812 int direction)
813{
815
816 /* Is the inferior 32-bit? If so, then do fixup the siginfo
817 object. */
818 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
819 {
820 if (direction == 0)
822 native);
823 else
825 (struct compat_siginfo *) inf);
826
827 return true;
828 }
829
830 return false;
831}
832
833/* Implement the "stopped_data_address" target_ops method. */
834
835bool
837{
838 siginfo_t siginfo;
839 struct aarch64_debug_reg_state *state;
840
841 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
842 return false;
843
844 /* This must be a hardware breakpoint. */
845 if (siginfo.si_signo != SIGTRAP
846 || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
847 return false;
848
849 /* Make sure to ignore the top byte, otherwise we may not recognize a
850 hardware watchpoint hit. The stopped data addresses coming from the
851 kernel can potentially be tagged addresses. */
853 const CORE_ADDR addr_trap
854 = gdbarch_remove_non_address_bits (gdbarch, (CORE_ADDR) siginfo.si_addr);
855
856 /* Check if the address matches any watched address. */
858 return aarch64_stopped_data_address (state, addr_trap, addr_p);
859}
860
861/* Implement the "stopped_by_watchpoint" target_ops method. */
862
863bool
865{
866 CORE_ADDR addr;
867
868 return stopped_data_address (&addr);
869}
870
871/* Implement the "can_do_single_step" target_ops method. */
872
873int
875{
876 return 1;
877}
878
879/* Implement the "thread_architecture" target_ops method.
880
881 Returns the gdbarch for the thread identified by PTID. If the thread in
882 question is a 32-bit ARM thread, then the architecture returned will be
883 that of the process itself.
884
885 If the thread is an AArch64 thread then we need to check the current
886 vector length; if the vector length has changed then we need to lookup a
887 new gdbarch that matches the new vector length. */
888
889struct gdbarch *
891{
892 /* Find the current gdbarch the same way as process_stratum_target. */
893 inferior *inf = find_inferior_ptid (this, ptid);
894 gdb_assert (inf != NULL);
895
896 /* If this is a 32-bit architecture, then this is ARM, not AArch64.
897 There's no SVE vectors here, so just return the inferior
898 architecture. */
899 if (gdbarch_bfd_arch_info (inf->gdbarch)->bits_per_word == 32)
900 return inf->gdbarch;
901
902 /* Only return it if the current vector length matches the one in the tdep. */
904 = gdbarch_tdep<aarch64_gdbarch_tdep> (inf->gdbarch);
905 uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
906 if (vq == tdep->vq)
907 return inf->gdbarch;
908
909 /* We reach here if the vector length for the thread is different from its
910 value at process start. Lookup gdbarch via info (potentially creating a
911 new one) by using a target description that corresponds to the new vq value
912 and the current architecture features. */
913
914 const struct target_desc *tdesc = gdbarch_target_desc (inf->gdbarch);
916 features.vq = vq;
917
918 struct gdbarch_info info;
919 info.bfd_arch_info = bfd_lookup_arch (bfd_arch_aarch64, bfd_mach_aarch64);
920 info.target_desc = aarch64_read_description (features);
921 return gdbarch_find_by_info (info);
922}
923
924/* Implement the "supports_memory_tagging" target_ops method. */
925
926bool
928{
929 return (linux_get_hwcap2 () & HWCAP2_MTE) != 0;
930}
931
932/* Implement the "fetch_memtags" target_ops method. */
933
934bool
935aarch64_linux_nat_target::fetch_memtags (CORE_ADDR address, size_t len,
936 gdb::byte_vector &tags, int type)
937{
938 int tid = get_ptrace_pid (inferior_ptid);
939
940 /* Allocation tags? */
941 if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
942 return aarch64_mte_fetch_memtags (tid, address, len, tags);
943
944 return false;
945}
946
947/* Implement the "store_memtags" target_ops method. */
948
949bool
950aarch64_linux_nat_target::store_memtags (CORE_ADDR address, size_t len,
951 const gdb::byte_vector &tags, int type)
952{
953 int tid = get_ptrace_pid (inferior_ptid);
954
955 /* Allocation tags? */
956 if (type == static_cast<int> (aarch64_memtag_type::mte_allocation))
957 return aarch64_mte_store_memtags (tid, address, len, tags);
958
959 return false;
960}
961
963void
965{
967
968 /* Register the target. */
971}
void aarch32_gp_regcache_collect(const struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_gp_regcache_supply(struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_vfp_regcache_collect(const struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
void aarch32_vfp_regcache_supply(struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
const target_desc * aarch32_read_description()
Definition: aarch32-tdep.c:30
void aarch64_linux_get_debug_reg_capacity(int tid)
static void aarch64_fetch_registers(struct regcache *regcache, int regno)
static void fetch_sveregs_from_thread(struct regcache *regcache)
static void fetch_mteregs_from_thread(struct regcache *regcache)
#define TRAP_HWBKPT
void _initialize_aarch64_linux_nat()
void supply_gregset(struct regcache *regcache, const gdb_gregset_t *gregsetp)
void fill_gregset(const struct regcache *regcache, gdb_gregset_t *gregsetp, int regno)
static void aarch32_store_registers(struct regcache *regcache, int regno)
static void store_gregs_to_thread(const struct regcache *regcache)
static void store_fpregs_to_thread(const struct regcache *regcache)
static aarch64_linux_nat_target the_aarch64_linux_nat_target
void supply_fpregset(struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
ps_err_e ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
static void fetch_tlsregs_from_thread(struct regcache *regcache)
static void store_mteregs_to_thread(struct regcache *regcache)
static void store_sveregs_to_thread(struct regcache *regcache)
static void fetch_fpregs_from_thread(struct regcache *regcache)
static void fetch_pauth_masks_from_thread(struct regcache *regcache)
static void aarch64_store_registers(struct regcache *regcache, int regno)
static void store_tlsregs_to_thread(struct regcache *regcache)
static void fetch_gregs_from_thread(struct regcache *regcache)
void fill_fpregset(const struct regcache *regcache, gdb_fpregset_t *fpregsetp, int regno)
static void aarch32_fetch_registers(struct regcache *regcache, int regno)
const struct regset aarch64_linux_fpregset
const struct regset aarch64_linux_gregset
#define AARCH64_LINUX_SIZEOF_GREGSET
#define AARCH64_HWCAP_PACA
#define AARCH64_LINUX_SIZEOF_FPREGSET
ps_err_e aarch64_ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base, int is_64bit_p)
void aarch64_linux_prepare_to_resume(struct lwp_info *lwp)
Definition: aarch64-linux.c:34
void aarch64_linux_new_thread(struct lwp_info *lwp)
Definition: aarch64-linux.c:74
void aarch64_compat_siginfo_from_siginfo(compat_siginfo_t *to, siginfo_t *from)
void aarch64_siginfo_from_compat_siginfo(siginfo_t *to, compat_siginfo_t *from)
int aarch64_tls_register_count(int tid)
void aarch64_linux_delete_thread(struct arch_lwp_info *arch_lwp)
Definition: aarch64-linux.c:95
bool aarch64_mte_store_memtags(int tid, CORE_ADDR address, size_t len, const gdb::byte_vector &tags)
bool aarch64_mte_fetch_memtags(int tid, CORE_ADDR address, size_t len, gdb::byte_vector &tags)
#define HWCAP2_MTE
void aarch64_initialize_hw_point()
Definition: aarch64-nat.c:298
struct aarch64_debug_reg_state * aarch64_get_debug_reg_state(pid_t pid)
Definition: aarch64-nat.c:51
bool aarch64_stopped_data_address(const struct aarch64_debug_reg_state *state, CORE_ADDR addr_trap, CORE_ADDR *addr_p)
Definition: aarch64-nat.c:231
void aarch64_remove_debug_reg_state(pid_t pid)
Definition: aarch64-nat.c:59
void aarch64_sve_regs_copy_to_reg_buf(struct reg_buffer_common *reg_buf, const void *buf)
std::unique_ptr< gdb_byte[]> aarch64_sve_get_sveregs(int tid)
void aarch64_sve_regs_copy_from_reg_buf(const struct reg_buffer_common *reg_buf, void *buf)
uint64_t aarch64_sve_get_vq(int tid)
bool aarch64_sve_set_vq(int tid, uint64_t vq)
aarch64_features aarch64_features_from_target_desc(const struct target_desc *tdesc)
const target_desc * aarch64_read_description(const aarch64_features &features)
#define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base)
Definition: aarch64.h:134
@ AARCH64_CPSR_REGNUM
Definition: aarch64.h:95
@ AARCH64_V31_REGNUM
Definition: aarch64.h:97
@ AARCH64_FPSR_REGNUM
Definition: aarch64.h:100
@ AARCH64_FPCR_REGNUM
Definition: aarch64.h:101
@ AARCH64_X0_REGNUM
Definition: aarch64.h:90
@ AARCH64_V0_REGNUM
Definition: aarch64.h:96
#define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base)
Definition: aarch64.h:133
gdb_static_assert(sizeof(splay_tree_key) >=sizeof(CORE_ADDR *))
struct gdbarch * target_gdbarch(void)
Definition: arch-utils.c:1453
struct gdbarch * gdbarch_find_by_info(struct gdbarch_info info)
Definition: arch-utils.c:1321
#define ARM_VFP3_REGS_SIZE
Definition: arm.h:170
@ ARM_FPSCR_REGNUM
Definition: arm.h:64
@ ARM_PS_REGNUM
Definition: arm.h:52
@ ARM_D0_REGNUM
Definition: arm.h:62
@ ARM_F0_REGNUM
Definition: arm.h:48
bool supports_memory_tagging() override
bool low_siginfo_fixup(siginfo_t *ptrace, gdb_byte *inf, int direction) override
void low_new_thread(struct lwp_info *lp) override
void post_startup_inferior(ptid_t) override
void low_forget_process(pid_t pid) override
int can_do_single_step() override
const struct target_desc * read_description() override
bool stopped_data_address(CORE_ADDR *) override
void low_new_fork(struct lwp_info *parent, pid_t child_pid) override
void low_delete_thread(struct arch_lwp_info *lp) override
void fetch_registers(struct regcache *, int) override
bool stopped_by_watchpoint() override
void store_registers(struct regcache *, int) override
void low_prepare_to_resume(struct lwp_info *lp) override
void post_attach(int pid) override
struct gdbarch * thread_architecture(ptid_t) override
bool store_memtags(CORE_ADDR address, size_t len, const gdb::byte_vector &tags, int type) override
bool fetch_memtags(CORE_ADDR address, size_t len, gdb::byte_vector &tags, int type) override
const target_info & info() const override
Definition: inf-child.c:49
void post_startup_inferior(ptid_t) override
Definition: linux-nat.c:390
void post_attach(int) override
Definition: linux-nat.c:382
gdbarch * arch() const
Definition: regcache.c:230
void raw_collect(int regnum, void *buf) const override
Definition: regcache.c:1118
void raw_supply(int regnum, const void *buf) override
Definition: regcache.c:1053
enum register_status get_register_status(int regnum) const override
Definition: regcache.c:303
ptid_t ptid() const
Definition: regcache.h:407
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition: frame.c:2907
frame_info_ptr get_current_frame(void)
Definition: frame.c:1615
#define ptrace(request, pid, addr, data)
Definition: gdb_ptrace.h:141
const struct target_desc * gdbarch_target_desc(struct gdbarch *gdbarch)
Definition: gdbarch.c:1397
CORE_ADDR gdbarch_remove_non_address_bits(struct gdbarch *gdbarch, CORE_ADDR pointer)
Definition: gdbarch.c:3104
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
Definition: gdbarch.c:1361
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int int rusage_t pid_t pid
Definition: gnu-nat.c:1792
size_t size
Definition: go32-nat.c:241
GDB_FPREGSET_T gdb_fpregset_t
Definition: gregset.h:35
GDB_GREGSET_T gdb_gregset_t
Definition: gregset.h:34
void add_inf_child_target(inf_child_target *target)
Definition: inf-child.c:418
pid_t get_ptrace_pid(ptid_t ptid)
Definition: inf-ptrace.c:238
ptid_t inferior_ptid
Definition: infcmd.c:91
struct inferior * find_inferior_ptid(process_stratum_target *targ, ptid_t ptid)
Definition: inferior.c:365
bool linux_nat_get_siginfo(ptid_t ptid, siginfo_t *siginfo)
Definition: linux-nat.c:4446
struct linux_nat_target * linux_target
Definition: linux-nat.c:190
#define PTRACE_SETREGSET
Definition: linux-ptrace.h:52
#define PTRACE_GETREGSET
Definition: linux-ptrace.h:48
CORE_ADDR linux_get_hwcap2()
Definition: linux-tdep.c:2705
CORE_ADDR linux_get_hwcap()
Definition: linux-tdep.c:2686
void regcache_collect_regset(const struct regset *regset, const struct regcache *regcache, int regnum, void *buf, size_t size)
Definition: regcache.c:1264
void regcache_supply_regset(const struct regset *regset, struct regcache *regcache, int regnum, const void *buf, size_t size)
Definition: regcache.c:1242
uint64_t vq
Definition: aarch64.h:32
uint8_t tls
Definition: aarch64.h:38
bool has_tls() const
Definition: aarch64-tdep.h:118
bool has_mte() const
Definition: aarch64-tdep.h:109
bool has_sve() const
Definition: aarch64-tdep.h:91
bool has_pauth() const
Definition: aarch64-tdep.h:100
int vfp_register_count
Definition: arm-tdep.h:102
Definition: gnu-nat.c:154
ptid_t ptid
Definition: linux-nat.h:211
struct arch_lwp_info * arch_private
Definition: linux-nat.h:279
Definition: gdbtypes.h:922
void perror_with_name(const char *string)
Definition: utils.c:643