43#include "gdbsupport/selftest.h"
53#include "opcode/aarch64.h"
55#include <unordered_map>
59#define HA_MAX_NUM_FLDS 4
85 "x0",
"x1",
"x2",
"x3",
86 "x4",
"x5",
"x6",
"x7",
87 "x8",
"x9",
"x10",
"x11",
88 "x12",
"x13",
"x14",
"x15",
89 "x16",
"x17",
"x18",
"x19",
90 "x20",
"x21",
"x22",
"x23",
91 "x24",
"x25",
"x26",
"x27",
92 "x28",
"x29",
"x30",
"sp",
101 "v0",
"v1",
"v2",
"v3",
102 "v4",
"v5",
"v6",
"v7",
103 "v8",
"v9",
"v10",
"v11",
104 "v12",
"v13",
"v14",
"v15",
105 "v16",
"v17",
"v18",
"v19",
106 "v20",
"v21",
"v22",
"v23",
107 "v24",
"v25",
"v26",
"v27",
108 "v28",
"v29",
"v30",
"v31",
118 "z0",
"z1",
"z2",
"z3",
119 "z4",
"z5",
"z6",
"z7",
120 "z8",
"z9",
"z10",
"z11",
121 "z12",
"z13",
"z14",
"z15",
122 "z16",
"z17",
"z18",
"z19",
123 "z20",
"z21",
"z22",
"z23",
124 "z24",
"z25",
"z26",
"z27",
125 "z28",
"z29",
"z30",
"z31",
127 "p0",
"p1",
"p2",
"p3",
128 "p4",
"p5",
"p6",
"p7",
129 "p8",
"p9",
"p10",
"p11",
130 "p12",
"p13",
"p14",
"p15",
191class abstract_instruction_reader
195 virtual ULONGEST
read (CORE_ADDR memaddr,
int len,
196 enum bfd_endian byte_order) = 0;
201class instruction_reader :
public abstract_instruction_reader
204 ULONGEST
read (CORE_ADDR memaddr,
int len,
enum bfd_endian byte_order)
227 addr = addr & ~cmask;
253 CORE_ADDR start, CORE_ADDR limit,
255 abstract_instruction_reader& reader)
263 bool seen_stack_set =
false;
272 for (; start < limit; start += 4)
277 insn = reader.read (start, 4, byte_order_for_code);
279 if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
282 if (inst.opcode->iclass == addsub_imm
283 && (inst.opcode->op == OP_ADD
284 || strcmp (
"sub", inst.opcode->name) == 0))
286 unsigned rd = inst.operands[0].reg.regno;
287 unsigned rn = inst.operands[1].reg.regno;
289 gdb_assert (aarch64_num_of_operands (inst.opcode) == 3);
290 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd_SP);
291 gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn_SP);
292 gdb_assert (inst.operands[2].type == AARCH64_OPND_AIMM);
294 if (inst.opcode->op == OP_ADD)
297 inst.operands[2].imm.value);
302 -inst.operands[2].imm.value);
307 seen_stack_set =
true;
309 else if (inst.opcode->iclass == addsub_ext
310 && strcmp (
"sub", inst.opcode->name) == 0)
312 unsigned rd = inst.operands[0].reg.regno;
313 unsigned rn = inst.operands[1].reg.regno;
314 unsigned rm = inst.operands[2].reg.regno;
316 gdb_assert (aarch64_num_of_operands (inst.opcode) == 3);
317 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd_SP);
318 gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn_SP);
319 gdb_assert (inst.operands[2].type == AARCH64_OPND_Rm_EXT);
323 else if (inst.opcode->iclass == branch_imm)
328 else if (inst.opcode->iclass == condbranch)
333 else if (inst.opcode->iclass == branch_reg)
338 else if (inst.opcode->iclass == compbranch)
343 else if (inst.opcode->op == OP_MOVZ)
345 unsigned rd = inst.operands[0].reg.regno;
347 gdb_assert (aarch64_num_of_operands (inst.opcode) == 2);
348 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
349 gdb_assert (inst.operands[1].type == AARCH64_OPND_HALF);
350 gdb_assert (inst.operands[1].shifter.kind == AARCH64_MOD_LSL);
358 << inst.operands[1].shifter.amount);
360 else if (inst.opcode->iclass == log_shift
361 && strcmp (inst.opcode->name,
"orr") == 0)
363 unsigned rd = inst.operands[0].reg.regno;
364 unsigned rn = inst.operands[1].reg.regno;
365 unsigned rm = inst.operands[2].reg.regno;
367 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rd);
368 gdb_assert (inst.operands[1].type == AARCH64_OPND_Rn);
369 gdb_assert (inst.operands[2].type == AARCH64_OPND_Rm_SFT);
371 if (inst.operands[2].shifter.amount == 0
377 "addr=%s opcode=0x%x (orr x register)",
378 core_addr_to_string_nz (start), insn);
383 else if (inst.opcode->op == OP_STUR)
385 unsigned rt = inst.operands[0].reg.regno;
386 unsigned rn = inst.operands[1].addr.base_regno;
387 int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
389 gdb_assert (aarch64_num_of_operands (inst.opcode) == 2);
390 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt);
391 gdb_assert (inst.operands[1].type == AARCH64_OPND_ADDR_SIMM9);
392 gdb_assert (!inst.operands[1].addr.offset.is_reg);
400 seen_stack_set =
true;
402 else if ((inst.opcode->iclass == ldstpair_off
403 || (inst.opcode->iclass == ldstpair_indexed
404 && inst.operands[2].addr.preind))
405 && strcmp (
"stp", inst.opcode->name) == 0)
410 unsigned rn = inst.operands[2].addr.base_regno;
411 int32_t imm = inst.operands[2].addr.offset.imm;
412 int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
414 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt
415 || inst.operands[0].type == AARCH64_OPND_Ft);
416 gdb_assert (inst.operands[1].type == AARCH64_OPND_Rt2
417 || inst.operands[1].type == AARCH64_OPND_Ft2);
418 gdb_assert (inst.operands[2].type == AARCH64_OPND_ADDR_SIMM7);
419 gdb_assert (!inst.operands[2].addr.offset.is_reg);
430 rt1 = inst.operands[0].reg.regno;
431 rt2 = inst.operands[1].reg.regno;
432 if (inst.operands[0].type == AARCH64_OPND_Ft)
441 if (inst.operands[2].addr.writeback)
447 seen_stack_set =
true;
449 else if ((inst.opcode->iclass == ldst_imm9
450 || (inst.opcode->iclass == ldst_pos
451 && (inst.opcode->op == OP_STR_POS
452 || inst.opcode->op == OP_STRF_POS)))
454 && strcmp (
"str", inst.opcode->name) == 0)
457 unsigned int rt = inst.operands[0].reg.regno;
458 int32_t imm = inst.operands[1].addr.offset.imm;
459 unsigned int rn = inst.operands[1].addr.base_regno;
460 int size = aarch64_get_qualifier_esize (inst.operands[0].qualifier);
461 gdb_assert (inst.operands[0].type == AARCH64_OPND_Rt
462 || inst.operands[0].type == AARCH64_OPND_Ft);
464 if (inst.operands[0].type == AARCH64_OPND_Ft)
468 if (inst.operands[1].addr.writeback)
473 seen_stack_set =
true;
475 else if (inst.opcode->iclass == testbranch)
480 else if (inst.opcode->iclass == ic_system)
483 = gdbarch_tdep<aarch64_gdbarch_tdep> (
gdbarch);
484 int ra_state_val = 0;
486 if (insn == 0xd503233f
487 || insn == 0xd503237f )
492 else if (insn == 0xd50323bf
493 || insn == 0xd50323ff )
504 " opcode=0x%x (iclass)",
505 core_addr_to_string_nz (start), insn);
509 if (tdep->
has_pauth () && cache !=
nullptr)
519 core_addr_to_string_nz (start), insn);
570 CORE_ADDR start, CORE_ADDR limit,
573 instruction_reader reader;
585class instruction_reader_test :
public abstract_instruction_reader
588 template<
size_t SIZE>
589 explicit instruction_reader_test (
const uint32_t (&insns)[
SIZE])
590 : m_insns (insns), m_insns_size (
SIZE)
593 ULONGEST
read (CORE_ADDR memaddr,
int len,
enum bfd_endian byte_order)
596 SELF_CHECK (len == 4);
597 SELF_CHECK (memaddr % 4 == 0);
598 SELF_CHECK (memaddr / 4 < m_insns_size);
600 return m_insns[memaddr / 4];
604 const uint32_t *m_insns;
609aarch64_analyze_prologue_test (
void)
613 info.bfd_arch_info = bfd_scan_arch (
"aarch64");
625 static const uint32_t insns[] = {
630 instruction_reader_test reader (insns);
633 SELF_CHECK (end == 4 * 2);
636 SELF_CHECK (cache.framesize == 272);
641 SELF_CHECK (cache.saved_regs[i].addr () == -272);
643 SELF_CHECK (cache.saved_regs[i].addr () == -264);
645 SELF_CHECK (cache.saved_regs[i].is_realreg ()
646 && cache.saved_regs[i].realreg () == i);
654 SELF_CHECK (cache.saved_regs[
regnum].is_realreg ()
662 static const uint32_t insns[] = {
670 instruction_reader_test reader (insns);
675 SELF_CHECK (end == 4 * 5);
678 SELF_CHECK (cache.framesize == 48);
683 SELF_CHECK (cache.saved_regs[i].addr () == -16);
685 SELF_CHECK (cache.saved_regs[i].addr () == -48);
687 SELF_CHECK (cache.saved_regs[i].is_realreg ()
688 && cache.saved_regs[i].realreg () == i);
698 SELF_CHECK (cache.saved_regs[
regnum].addr () == -24);
700 SELF_CHECK (cache.saved_regs[
regnum].is_realreg ()
707 static const uint32_t insns[] = {
715 instruction_reader_test reader (insns);
721 SELF_CHECK (end == (4 - 1) * 4);
723 SELF_CHECK (cache.framesize == 16);
729 static const uint32_t insns[] = {
738 instruction_reader_test reader (insns);
744 SELF_CHECK (end == (5 - 1) * 4);
746 SELF_CHECK (cache.framesize == 64);
752 static const uint32_t insns[] = {
761 instruction_reader_test reader (insns);
767 SELF_CHECK (end == (5 - 1) * 4);
769 SELF_CHECK (cache.framesize == 64);
775 static const uint32_t insns[] = {
784 instruction_reader_test reader (insns);
790 SELF_CHECK (end == (5 - 1) * 4);
792 SELF_CHECK (cache.framesize == 64);
798 static const uint32_t insns[] = {
805 instruction_reader_test reader (insns);
811 SELF_CHECK (end == (4 - 1) * 4);
813 SELF_CHECK (cache.framesize == 16);
819 static const uint32_t insns[] = {
826 instruction_reader_test reader (insns);
832 SELF_CHECK (end == 4 * 4);
834 SELF_CHECK (cache.framesize == 48);
839 SELF_CHECK (cache.saved_regs[i].addr () == -20);
841 SELF_CHECK (cache.saved_regs[i].addr () == -48);
843 SELF_CHECK (cache.saved_regs[i].addr () == -40);
845 SELF_CHECK (cache.saved_regs[i].is_realreg ()
846 && cache.saved_regs[i].realreg () == i);
852 SELF_CHECK (cache.saved_regs[
regnum].is_value ());
858 static const uint32_t insns[] = {
865 instruction_reader_test reader (insns);
871 SELF_CHECK (end == 4 * 4);
873 SELF_CHECK (cache.framesize == 48);
878 SELF_CHECK (cache.saved_regs[i].addr () == -20);
880 SELF_CHECK (cache.saved_regs[i].addr () == -48);
882 SELF_CHECK (cache.saved_regs[i].addr () == -40);
884 SELF_CHECK (cache.saved_regs[i].is_realreg ()
885 && cache.saved_regs[i].realreg () == i);
897 CORE_ADDR func_addr, limit_pc;
904 CORE_ADDR post_prologue_pc
907 if (post_prologue_pc != 0)
908 return std::max (pc, post_prologue_pc);
934 CORE_ADDR prologue_start;
935 CORE_ADDR prologue_end;
953 prologue_end = prev_pc;
955 else if (sal.
end < prologue_end)
958 prologue_end = sal.
end;
961 prologue_end = std::min (prologue_end, prev_pc);
987 CORE_ADDR unwound_fp;
1023 if (*this_cache != NULL)
1028 *this_cache = cache;
1034 catch (
const gdb_exception_error &ex)
1036 if (ex.error != NOT_AVAILABLE_ERROR)
1053 return UNWIND_UNAVAILABLE;
1059 return UNWIND_OUTERMOST;
1063 return UNWIND_OUTERMOST;
1065 return UNWIND_NO_REASON;
1073 void **this_cache,
struct frame_id *this_id)
1086static struct value *
1088 void **this_cache,
int prev_regnum)
1101 = gdbarch_tdep<aarch64_gdbarch_tdep> (
gdbarch);
1157 if (*this_cache != NULL)
1162 *this_cache = cache;
1171 catch (
const gdb_exception_error &ex)
1173 if (ex.error != NOT_AVAILABLE_ERROR)
1190 return UNWIND_UNAVAILABLE;
1192 return UNWIND_NO_REASON;
1199 void **this_cache,
struct frame_id *this_id)
1215 void **this_prologue_cache)
1217 CORE_ADDR addr_in_block;
1265static struct value *
1267 void **this_cache,
int regnum)
1281 internal_error (_(
"Unexpected register %d"),
regnum);
1317 reg->loc.exp.len = 1;
1338 if (op == DW_CFA_AARCH64_negate_ra_state)
1374 const uint32_t insn_len = 4;
1375 gdb_byte target_mem[4];
1380 scoped_restore restore_memory
1442 struct type **fundamental_type)
1444 if (
type ==
nullptr)
1450 case TYPE_CODE_DECFLOAT:
1454 if (*fundamental_type ==
nullptr)
1455 *fundamental_type =
type;
1456 else if (
type->
length () != (*fundamental_type)->length ()
1457 ||
type->
code () != (*fundamental_type)->code ())
1462 case TYPE_CODE_COMPLEX:
1468 if (*fundamental_type ==
nullptr)
1477 case TYPE_CODE_ARRAY:
1484 if (*fundamental_type ==
nullptr)
1485 *fundamental_type =
type;
1486 else if (
type->
length () != (*fundamental_type)->length ()
1487 ||
type->
code () != (*fundamental_type)->code ())
1506 case TYPE_CODE_STRUCT:
1507 case TYPE_CODE_UNION:
1520 (member, fundamental_type);
1521 if (sub_count == -1)
1528 int ftype_length = (*fundamental_type ==
nullptr)
1529 ? 0 : (*fundamental_type)->length ();
1563 struct type **fundamental_type)
1565 if (
type ==
nullptr)
1568 *fundamental_type =
nullptr;
1601 std::vector<stack_item_t>
si;
1628 if (byte_order == BFD_ENDIAN_BIG
1630 && (typecode == TYPE_CODE_STRUCT || typecode == TYPE_CODE_UNION))
1653 int len,
const bfd_byte *buf)
1660 gdb_assert (len <=
sizeof (reg));
1665 memset (reg, 0,
sizeof (reg));
1668 memcpy (reg, buf, len);
1697 align = align_up (align, 8);
1708 info->si.push_back (item);
1711 if (info->nsaa & (align - 1))
1714 int pad = align - (info->nsaa & (align - 1));
1719 info->si.push_back (item);
1737 if (info->ngrn + nregs <= 8)
1740 info->ngrn += nregs;
1758 switch (arg_type->
code ())
1761 case TYPE_CODE_DECFLOAT:
1766 case TYPE_CODE_COMPLEX:
1779 case TYPE_CODE_ARRAY:
1785 case TYPE_CODE_STRUCT:
1786 case TYPE_CODE_UNION:
1787 for (
int i = 0; i < arg_type->
num_fields (); i++)
1813 struct value **args, CORE_ADDR sp,
1815 CORE_ADDR struct_addr)
1865 struct value *arg = args[argnum];
1866 struct type *arg_type, *fundamental_type;
1870 len = arg_type->
length ();
1877 if (info.nsrn + elements <= 8)
1883 gdb_assert_not_reached (
"Failed to push args");
1893 switch (arg_type->
code ())
1896 case TYPE_CODE_BOOL:
1897 case TYPE_CODE_CHAR:
1898 case TYPE_CODE_RANGE:
1899 case TYPE_CODE_ENUM:
1912 case TYPE_CODE_STRUCT:
1913 case TYPE_CODE_ARRAY:
1914 case TYPE_CODE_UNION:
1921 sp = align_down (sp - len, 16);
1944 sp -= 16 - (info.nsaa & 15);
1946 while (!info.si.empty ())
1951 if (si.
data != NULL)
1953 info.si.pop_back ();
1968 return sp & ~(CORE_ADDR) 15;
2234 info->symbols = NULL;
2256 struct type *fundamental_type;
2261 int len = fundamental_type->
length ();
2263 for (
int i = 0; i < elements; i++)
2268 gdb_assert (len <=
sizeof (buf));
2271 (
"read HFA or HVA return value element %d from %s",
2276 memcpy (valbuf, buf, len);
2280 else if (
type->
code () == TYPE_CODE_INT
2285 ||
type->
code () == TYPE_CODE_ENUM)
2335 struct type *fundamental_type;
2362 const gdb_byte *valbuf)
2367 struct type *fundamental_type;
2372 int len = fundamental_type->
length ();
2374 for (
int i = 0; i < elements; i++)
2379 gdb_assert (len <=
sizeof (tmpbuf));
2382 (
"write HFA or HVA return value element %d to %s",
2385 memcpy (tmpbuf, valbuf,
2391 else if (
type->
code () == TYPE_CODE_INT
2396 ||
type->
code () == TYPE_CODE_ENUM)
2435 memcpy (tmpbuf, valbuf,
2449 gdb_byte *readbuf,
const gdb_byte *writebuf)
2452 if (valtype->
code () == TYPE_CODE_STRUCT
2453 || valtype->
code () == TYPE_CODE_UNION
2454 || valtype->
code () == TYPE_CODE_ARRAY)
2483 aarch64_extract_return_value (valtype,
regcache, readbuf);
2547 static const char *
const w_name[] =
2549 "w0",
"w1",
"w2",
"w3",
2550 "w4",
"w5",
"w6",
"w7",
2551 "w8",
"w9",
"w10",
"w11",
2552 "w12",
"w13",
"w14",
"w15",
2553 "w16",
"w17",
"w18",
"w19",
2554 "w20",
"w21",
"w22",
"w23",
2555 "w24",
"w25",
"w26",
"w27",
2556 "w28",
"w29",
"w30",
2559 static const char *
const q_name[] =
2561 "q0",
"q1",
"q2",
"q3",
2562 "q4",
"q5",
"q6",
"q7",
2563 "q8",
"q9",
"q10",
"q11",
2564 "q12",
"q13",
"q14",
"q15",
2565 "q16",
"q17",
"q18",
"q19",
2566 "q20",
"q21",
"q22",
"q23",
2567 "q24",
"q25",
"q26",
"q27",
2568 "q28",
"q29",
"q30",
"q31",
2571 static const char *
const d_name[] =
2573 "d0",
"d1",
"d2",
"d3",
2574 "d4",
"d5",
"d6",
"d7",
2575 "d8",
"d9",
"d10",
"d11",
2576 "d12",
"d13",
"d14",
"d15",
2577 "d16",
"d17",
"d18",
"d19",
2578 "d20",
"d21",
"d22",
"d23",
2579 "d24",
"d25",
"d26",
"d27",
2580 "d28",
"d29",
"d30",
"d31",
2583 static const char *
const s_name[] =
2585 "s0",
"s1",
"s2",
"s3",
2586 "s4",
"s5",
"s6",
"s7",
2587 "s8",
"s9",
"s10",
"s11",
2588 "s12",
"s13",
"s14",
"s15",
2589 "s16",
"s17",
"s18",
"s19",
2590 "s20",
"s21",
"s22",
"s23",
2591 "s24",
"s25",
"s26",
"s27",
2592 "s28",
"s29",
"s30",
"s31",
2595 static const char *
const h_name[] =
2597 "h0",
"h1",
"h2",
"h3",
2598 "h4",
"h5",
"h6",
"h7",
2599 "h8",
"h9",
"h10",
"h11",
2600 "h12",
"h13",
"h14",
"h15",
2601 "h16",
"h17",
"h18",
"h19",
2602 "h20",
"h21",
"h22",
"h23",
2603 "h24",
"h25",
"h26",
"h27",
2604 "h28",
"h29",
"h30",
"h31",
2607 static const char *
const b_name[] =
2609 "b0",
"b1",
"b2",
"b3",
2610 "b4",
"b5",
"b6",
"b7",
2611 "b8",
"b9",
"b10",
"b11",
2612 "b12",
"b13",
"b14",
"b15",
2613 "b16",
"b17",
"b18",
"b19",
2614 "b20",
"b21",
"b22",
"b23",
2615 "b24",
"b25",
"b26",
"b27",
2616 "b28",
"b29",
"b30",
"b31",
2642 static const char *
const sve_v_name[] =
2644 "v0",
"v1",
"v2",
"v3",
2645 "v4",
"v5",
"v6",
"v7",
2646 "v8",
"v9",
"v10",
"v11",
2647 "v12",
"v13",
"v14",
"v15",
2648 "v16",
"v17",
"v18",
"v19",
2649 "v20",
"v21",
"v22",
"v23",
2650 "v24",
"v25",
"v26",
"v27",
2651 "v28",
"v29",
"v30",
"v31",
2665 internal_error (_(
"aarch64_pseudo_register_name: bad register number %d"),
2704 internal_error (_(
"aarch64_pseudo_register_type: bad register number %d"),
2742static struct value *
2745 int regsize,
struct value *result_value)
2759 return result_value;
2764static struct value *
2780 if (byte_order == BFD_ENDIAN_BIG)
2793 return result_value;
2829 gdb_assert_not_reached (
"regnum out of bound");
2836 int regnum_offset,
int regsize,
const gdb_byte *buf)
2850 memcpy (reg_buf, buf, regsize);
2858 int regnum,
const gdb_byte *buf)
2868 if (byte_order == BFD_ENDIAN_BIG)
2915 gdb_assert_not_reached (
"regnum out of bound");
2920static struct value *
2923 const int *reg_p = (
const int *) baton;
2932static std::vector<CORE_ADDR>
2937 const int insn_size = 4;
2938 const int atomic_sequence_length = 16;
2940 CORE_ADDR breaks[2] = { CORE_ADDR_MAX, CORE_ADDR_MAX };
2942 CORE_ADDR closing_insn = 0;
2944 ULONGEST insn_from_memory;
2946 byte_order_for_code,
2954 uint32_t insn = insn_from_memory;
2957 int bc_insn_count = 0;
2958 int last_breakpoint = 0;
2961 if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
2965 if (inst.opcode->iclass != ldstexcl ||
bit (insn, 22) == 0)
2968 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
2973 byte_order_for_code,
2981 insn = insn_from_memory;
2982 if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
2985 if (inst.opcode->iclass == condbranch)
2987 gdb_assert (inst.operands[0].type == AARCH64_OPND_ADDR_PCREL19);
2989 if (bc_insn_count >= 1)
2993 breaks[1] =
loc + inst.operands[0].imm.value;
3000 if (inst.opcode->iclass == ldstexcl &&
bit (insn, 22) == 0)
3012 breaks[0] =
loc + insn_size;
3017 && (breaks[1] == breaks[0]
3018 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
3019 last_breakpoint = 0;
3021 std::vector<CORE_ADDR> next_pcs;
3025 for (index = 0; index <= last_breakpoint; index++)
3026 next_pcs.push_back (breaks[index]);
3069 int64_t new_offset = data->insn_addr - dsd->
new_addr + offset;
3091 data->insn_addr + 4);
3136 const unsigned rn,
int is64,
3160 const unsigned rt,
unsigned bit,
3191 CORE_ADDR address = data->insn_addr + offset;
3212 const unsigned rt,
const int is64,
3217 CORE_ADDR address = data->insn_addr + offset;
3243 if (masked_insn ==
BLR)
3249 data->insn_addr + 4);
3255 if (masked_insn ==
RET || masked_insn ==
BR || masked_insn ==
BLR)
3276 CORE_ADDR from, CORE_ADDR to,
3282 ULONGEST insn_from_memory;
3288 uint32_t insn = insn_from_memory;
3290 if (aarch64_decode_insn (insn, &inst, 1, NULL) != 0)
3294 if (inst.opcode->iclass == ldstexcl &&
bit (insn, 22))
3300 std::unique_ptr<aarch64_displaced_step_copy_insn_closure>
dsc
3341 CORE_ADDR from, CORE_ADDR to,
3363 else if (pc - to == 4)
3369 gdb_assert_not_reached (
"Unexpected PC value after displaced stepping");
3419 error (_(
"VQ is %" PRIu64
", maximum supported value is %d"), features.
vq,
3438 const struct tdesc_feature *feature_sve;
3445 if (feature_sve ==
nullptr)
3460 if (tdesc ==
nullptr)
3469 const struct tdesc_feature *tls_feature
3472 if (tls_feature !=
nullptr)
3504 CORE_ADDR func_start, func_end;
3510 ULONGEST insn_from_memory;
3515 uint32_t insn = insn_from_memory;
3518 if (aarch64_decode_insn (insn, &inst, 1,
nullptr) != 0)
3521 return streq (inst.opcode->name,
"ret");
3534 const struct tdesc_feature *feature_core, *feature_fpu, *feature_sve;
3535 const struct tdesc_feature *feature_pauth;
3536 bool valid_p =
true;
3537 int i, num_regs = 0, num_pseudo_regs = 0;
3538 int first_pauth_regnum = -1, ra_sign_state_offset = -1;
3539 int first_mte_regnum = -1, first_tls_regnum = -1;
3543 internal_error (_(
"VQ out of bounds: %s (max %d)"),
3548 best_arch !=
nullptr;
3552 = gdbarch_tdep<aarch64_gdbarch_tdep> (best_arch->gdbarch);
3553 if (tdep && tdep->
vq == vq)
3554 return best_arch->gdbarch;
3559 const struct target_desc *tdesc = info.target_desc;
3568 const struct tdesc_feature *feature_mte
3570 const struct tdesc_feature *feature_tls
3573 if (feature_core ==
nullptr)
3588 if (feature_fpu !=
nullptr)
3590 if (feature_sve !=
nullptr)
3591 error (_(
"Program contains both fpu and SVE features."));
3604 if (feature_sve !=
nullptr)
3614 num_pseudo_regs += 32;
3617 if (feature_fpu !=
nullptr || feature_sve !=
nullptr)
3619 num_pseudo_regs += 32;
3620 num_pseudo_regs += 32;
3621 num_pseudo_regs += 32;
3622 num_pseudo_regs += 32;
3623 num_pseudo_regs += 32;
3627 int tls_register_count = 0;
3628 if (feature_tls !=
nullptr)
3630 first_tls_regnum = num_regs;
3636 first_tls_regnum,
"tpidr");
3640 tls_register_count++;
3644 first_tls_regnum + tls_register_count,
3649 tls_register_count++;
3651 num_regs += tls_register_count;
3655 warning (_(
"Provided TLS register feature doesn't contain "
3656 "required tpidr register."));
3662 if (feature_pauth != NULL)
3664 first_pauth_regnum = num_regs;
3665 ra_sign_state_offset = num_pseudo_regs;
3670 first_pauth_regnum + i,
3674 num_pseudo_regs += 1;
3678 if (feature_mte != NULL)
3680 first_mte_regnum = num_regs;
3685 first_mte_regnum + i,
3691 int first_w_regnum = num_pseudo_regs;
3692 num_pseudo_regs += 31;
3698 info.byte_order_for_code = BFD_ENDIAN_LITTLE;
3725 aarch64_breakpoint::kind_from_pc);
3727 aarch64_breakpoint::bp_from_kind);
3777 info.target_desc = tdesc;
3800 if (tdep->
jb_pc >= 0)
3844 gdb_printf (file, _(
"aarch64_dump_tdep: Lowest pc = 0x%s\n"),
3851static void aarch64_process_record_test (
void);
3864Set AArch64 debugging."), _(
"\
3865Show AArch64 debugging."), _(
"\
3866When on, AArch64 specific debugging is enabled."),
3872 selftests::register_test (
"aarch64-analyze-prologue",
3873 selftests::aarch64_analyze_prologue_test);
3874 selftests::register_test (
"aarch64-process-record",
3875 selftests::aarch64_process_record_test);
3881#define REG_ALLOC(REGS, LENGTH, RECORD_BUF) \
3884 unsigned int reg_len = LENGTH; \
3887 REGS = XNEWVEC (uint32_t, reg_len); \
3888 memcpy(®S[0], &RECORD_BUF[0], sizeof(uint32_t)*LENGTH); \
3893#define MEM_ALLOC(MEMS, LENGTH, RECORD_BUF) \
3896 unsigned int mem_len = LENGTH; \
3899 MEMS = XNEWVEC (struct aarch64_mem_r, mem_len); \
3900 memcpy(MEMS, &RECORD_BUF[0], \
3901 sizeof(struct aarch64_mem_r) * LENGTH); \
3938 uint8_t reg_rd, insn_bits24_27, insn_bits21_23;
3939 uint32_t record_buf[4];
3950 if (insn_bits24_27 == 0x0a)
3953 else if (insn_bits24_27 == 0x0b)
3958 record_buf[0] = reg_rd;
3965 if (insn_bits24_27 == 0x0b)
3968 record_buf[0] = reg_rd;
3971 else if (insn_bits24_27 == 0x0a)
3973 if (insn_bits21_23 == 0x00)
3976 record_buf[0] = reg_rd;
3984 else if (insn_bits21_23 == 0x02)
3991 else if (insn_bits21_23 == 0x04 || insn_bits21_23 == 0x06)
3996 record_buf[0] = reg_rd;
4014 uint8_t reg_rd, insn_bit23, insn_bits24_27, setflags;
4015 uint32_t record_buf[4];
4021 if (insn_bits24_27 == 0x00
4022 || insn_bits24_27 == 0x03
4023 || (insn_bits24_27 == 0x02 && insn_bit23))
4025 record_buf[0] = reg_rd;
4028 else if (insn_bits24_27 == 0x01)
4032 record_buf[0] = reg_rd;
4037 else if (insn_bits24_27 == 0x02 && !insn_bit23)
4041 record_buf[0] = reg_rd;
4061 = gdbarch_tdep<aarch64_gdbarch_tdep> (aarch64_insn_r->
gdbarch);
4062 uint8_t insn_bits24_27, insn_bits28_31, insn_bits22_23;
4063 uint32_t record_buf[4];
4069 if (insn_bits28_31 == 0x0d)
4072 if (insn_bits24_27 == 0x04)
4078 ULONGEST svc_number;
4089 else if (insn_bits24_27 == 0x05 && insn_bits22_23 == 0x00)
4091 uint32_t reg_rt, reg_crn;
4099 record_buf[0] = reg_rt;
4103 else if (reg_crn == 0x02 || reg_crn == 0x04)
4110 else if((insn_bits24_27 & 0x0e) == 0x06)
4120 else if ((insn_bits28_31 & 0x07) == 0x01 && (insn_bits24_27 & 0x0c) == 0x04)
4142 uint64_t addr_offset = 0;
4143 uint32_t record_buf[24];
4144 uint64_t record_buf_mem[24];
4145 uint32_t reg_rn, reg_rt;
4146 uint32_t reg_index = 0, mem_index = 0;
4147 uint8_t opcode_bits, size_bits;
4156 debug_printf (
"Process record: Advanced SIMD load/store\n");
4161 uint8_t sindex, scale, selem, esize, replicate = 0;
4162 scale = opcode_bits >> 2;
4163 selem = ((opcode_bits & 0x02) |
4168 if (size_bits & 0x01)
4172 if ((size_bits >> 1) & 0x01)
4174 if (size_bits & 0x01)
4176 if (!((opcode_bits >> 1) & 0x01))
4196 for (sindex = 0; sindex < selem; sindex++)
4199 reg_rt = (reg_rt + 1) % 32;
4203 for (sindex = 0; sindex < selem; sindex++)
4209 record_buf_mem[mem_index++] = esize / 8;
4210 record_buf_mem[mem_index++] = address + addr_offset;
4212 addr_offset = addr_offset + (esize / 8);
4213 reg_rt = (reg_rt + 1) % 32;
4220 uint8_t selem, esize, rpt, elements;
4221 uint8_t eindex, rindex;
4223 esize = 8 << size_bits;
4225 elements = 128 / esize;
4227 elements = 64 / esize;
4229 switch (opcode_bits)
4270 for (rindex = 0; rindex < rpt; rindex++)
4271 for (eindex = 0; eindex < elements; eindex++)
4273 uint8_t reg_tt, sindex;
4274 reg_tt = (reg_rt + rindex) % 32;
4275 for (sindex = 0; sindex < selem; sindex++)
4281 record_buf_mem[mem_index++] = esize / 8;
4282 record_buf_mem[mem_index++] = address + addr_offset;
4284 addr_offset = addr_offset + (esize / 8);
4285 reg_tt = (reg_tt + 1) % 32;
4291 record_buf[reg_index++] = reg_rn;
4307 uint8_t insn_bits24_27, insn_bits28_29, insn_bits10_11;
4308 uint8_t insn_bit23, insn_bit21;
4309 uint8_t opc, size_bits, ld_flag, vector_flag;
4310 uint32_t reg_rn, reg_rt, reg_rt2;
4311 uint64_t datasize, offset;
4312 uint32_t record_buf[8];
4313 uint64_t record_buf_mem[8];
4329 if (insn_bits24_27 == 0x08 && insn_bits28_29 == 0x00)
4332 debug_printf (
"Process record: load/store exclusive\n");
4336 record_buf[0] = reg_rt;
4340 record_buf[1] = reg_rt2;
4347 datasize = (8 << size_bits) * 2;
4349 datasize = (8 << size_bits);
4352 record_buf_mem[0] = datasize / 8;
4353 record_buf_mem[1] = address;
4364 else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x01)
4367 debug_printf (
"Process record: load register (literal)\n");
4371 record_buf[0] = reg_rt;
4375 else if ((insn_bits24_27 & 0x0a) == 0x08 && insn_bits28_29 == 0x02)
4378 debug_printf (
"Process record: load/store pair\n");
4389 record_buf[0] = reg_rt;
4390 record_buf[1] = reg_rt2;
4399 size_bits = size_bits >> 1;
4400 datasize = 8 << (2 + size_bits);
4401 offset = (imm7_off & 0x40) ? (~imm7_off & 0x007f) + 1 : imm7_off;
4402 offset = offset << (2 + size_bits);
4405 if (!((insn_bits24_27 & 0x0b) == 0x08 && insn_bit23))
4407 if (imm7_off & 0x40)
4408 address = address - offset;
4410 address = address + offset;
4413 record_buf_mem[0] = datasize / 8;
4414 record_buf_mem[1] = address;
4415 record_buf_mem[2] = datasize / 8;
4416 record_buf_mem[3] = address + (datasize / 8);
4423 else if ((insn_bits24_27 & 0x0b) == 0x09 && insn_bits28_29 == 0x03)
4435 if (size_bits == 0x3 && vector_flag == 0x0 && opc == 0x2)
4440 else if (size_bits == 0x2 && vector_flag == 0x0 && opc == 0x2)
4456 debug_printf (
"Process record: load/store (unsigned immediate):"
4457 " size %x V %d opc %x\n", size_bits, vector_flag,
4464 datasize = 8 << size_bits;
4467 offset = offset << size_bits;
4468 address = address + offset;
4470 record_buf_mem[0] = datasize >> 3;
4471 record_buf_mem[1] = address;
4479 record_buf[0] = reg_rt;
4484 else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x03
4485 && insn_bits10_11 == 0x02 && insn_bit21)
4488 debug_printf (
"Process record: load/store (register offset)\n");
4496 if (size_bits != 0x03)
4503 ULONGEST reg_rm_val;
4508 offset = reg_rm_val << size_bits;
4510 offset = reg_rm_val;
4511 datasize = 8 << size_bits;
4514 address = address + offset;
4515 record_buf_mem[0] = datasize >> 3;
4516 record_buf_mem[1] = address;
4524 record_buf[0] = reg_rt;
4529 else if ((insn_bits24_27 & 0x0b) == 0x08 && insn_bits28_29 == 0x03
4534 debug_printf (
"Process record: load/store "
4535 "(immediate and unprivileged)\n");
4544 if (size_bits != 0x03)
4553 offset = (imm9_off & 0x0100) ? (((~imm9_off) & 0x01ff) + 1) : imm9_off;
4554 datasize = 8 << size_bits;
4557 if (insn_bits10_11 != 0x01)
4559 if (imm9_off & 0x0100)
4560 address = address - offset;
4562 address = address + offset;
4564 record_buf_mem[0] = datasize >> 3;
4565 record_buf_mem[1] = address;
4573 record_buf[0] = reg_rt;
4576 if (insn_bits10_11 == 0x01 || insn_bits10_11 == 0x03)
4595 uint8_t insn_bit21, opcode, rmode, reg_rd;
4596 uint8_t insn_bits24_27, insn_bits28_31, insn_bits10_11, insn_bits12_15;
4597 uint8_t insn_bits11_14;
4598 uint32_t record_buf[2];
4611 debug_printf (
"Process record: data processing SIMD/FP: ");
4613 if ((insn_bits28_31 & 0x05) == 0x01 && insn_bits24_27 == 0x0e)
4619 debug_printf (
"FP - fixed point conversion");
4621 if ((opcode >> 1) == 0x0 && rmode == 0x03)
4622 record_buf[0] = reg_rd;
4627 else if (insn_bits10_11 == 0x01)
4630 debug_printf (
"FP - conditional compare");
4636 else if (insn_bits10_11 == 0x02 || insn_bits10_11 == 0x03)
4639 debug_printf (
"FP - DP (2-source)");
4643 else if (insn_bits10_11 == 0x00)
4646 if ((insn_bits12_15 & 0x01) == 0x01
4647 || (insn_bits12_15 & 0x07) == 0x04)
4650 debug_printf (
"FP - immediate");
4654 else if ((insn_bits12_15 & 0x03) == 0x02)
4657 debug_printf (
"FP - immediate");
4661 else if (insn_bits12_15 == 0x00)
4664 if (!(opcode >> 1) || ((opcode >> 1) == 0x02 && !rmode))
4667 debug_printf (
"float to int conversion");
4672 else if ((opcode >> 1) == 0x01 && !rmode)
4675 debug_printf (
"int to float conversion");
4680 else if ((opcode >> 1) == 0x03)
4683 debug_printf (
"move float to int");
4685 if (!(opcode & 0x01))
4699 else if ((insn_bits28_31 & 0x09) == 0x00 && insn_bits24_27 == 0x0e)
4702 debug_printf (
"SIMD copy");
4709 if (insn_bits11_14 == 0x05 || insn_bits11_14 == 0x07)
4721 debug_printf (
"all remain");
4727 debug_printf (
"\n");
4748 uint32_t ins_bit25, ins_bit26, ins_bit27, ins_bit28;
4756 if (!ins_bit26 && !ins_bit27 && ins_bit28)
4760 if (ins_bit26 && !ins_bit27 && ins_bit28)
4764 if (!ins_bit25 && ins_bit27)
4768 if (ins_bit25 && !ins_bit26 && ins_bit27)
4772 if (ins_bit25 && ins_bit26 && ins_bit27)
4783 xfree (record->aarch64_regs);
4784 xfree (record->aarch64_mems);
4791aarch64_process_record_test (
void)
4796 info.bfd_arch_info = bfd_scan_arch (
"aarch64");
4827 CORE_ADDR insn_addr)
4829 uint32_t rec_no = 0;
4830 uint8_t insn_size = 4;
4832 gdb_byte buf[insn_size];
4835 memset (&buf[0], 0, insn_size);
4850 _(
"Process record does not support instruction "
4851 "0x%0x at address %s.\n"),
4866 for (rec_no = 0; rec_no < aarch64_record.
reg_rec_count; rec_no++)
4873 for (rec_no = 0; rec_no < aarch64_record.
mem_rec_count; rec_no++)
int aarch64_emit_insn(uint32_t *buf, uint32_t insn)
void aarch64_relocate_instruction(uint32_t insn, const struct aarch64_insn_visitor *visitor, struct aarch64_insn_data *data)
#define IS_BTI(instruction)
#define emit_b(buf, is_bl, offset)
#define emit_bcond(buf, cond, offset)
#define aarch64_debug_printf(fmt,...)
#define bits(obj, st, fn)
#define can_encode_int32(val, bits)
#define emit_tb(buf, is_tbnz, bit, rt, offset)
#define emit_cb(buf, is_cbnz, rt, offset)
#define emit_ldrsw(buf, rt, rn, operand)
#define emit_ldr(buf, rt, rn, operand)
void register_aarch64_ravenscar_ops(struct gdbarch *gdbarch)
static void aarch64_pseudo_write(struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
static struct value * value_of_aarch64_user_reg(frame_info_ptr frame, const void *baton)
static std::unordered_map< aarch64_features, target_desc * > tdesc_aarch64_map
static int aarch64_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
static int aarch64_pseudo_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
static bool aapcs_is_vfp_call_or_return_candidate(struct type *type, int *count, struct type **fundamental_type)
static void pass_in_x(struct gdbarch *gdbarch, struct regcache *regcache, struct aarch64_call_info *info, struct type *type, struct value *arg)
displaced_step_copy_insn_closure_up aarch64_displaced_step_copy_insn(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
constexpr gdb_byte aarch64_default_breakpoint[]
static void aarch64_stub_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
void _initialize_aarch64_tdep()
#define REG_ALLOC(REGS, LENGTH, RECORD_BUF)
static void aarch64_displaced_step_adr(const int32_t offset, const unsigned rd, const int is_adrp, struct aarch64_insn_data *data)
static const unsigned char op_lit0
static struct value * aarch64_prologue_prev_register(frame_info_ptr this_frame, void **this_cache, int prev_regnum)
static void aarch64_store_return_value(struct type *type, struct regcache *regs, const gdb_byte *valbuf)
static struct type * aarch64_vnd_type(struct gdbarch *gdbarch)
static int aarch64_gdb_print_insn(bfd_vma memaddr, disassemble_info *info)
static ULONGEST aarch64_type_align(gdbarch *gdbarch, struct type *t)
static unsigned int aarch64_record_data_proc_simd_fp(aarch64_insn_decode_record *aarch64_insn_r)
static constexpr uint32_t BRK_INSN_MASK
static void aarch64_displaced_step_cb(const int32_t offset, const int is_cbnz, const unsigned rn, int is64, struct aarch64_insn_data *data)
static struct value * aarch64_pseudo_read_value(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum)
static CORE_ADDR aarch64_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR start, CORE_ADDR limit, struct aarch64_prologue_cache *cache, abstract_instruction_reader &reader)
static void aarch64_displaced_step_b(const int is_bl, const int32_t offset, struct aarch64_insn_data *data)
static int aapcs_is_vfp_call_or_return_candidate_1(struct type *type, struct type **fundamental_type)
static void aarch64_displaced_step_others(const uint32_t insn, struct aarch64_insn_data *data)
static int aarch64_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int reg)
#define MEM_ALLOC(MEMS, LENGTH, RECORD_BUF)
static const struct aarch64_insn_visitor visitor
static void aarch64_scan_prologue(frame_info_ptr this_frame, struct aarch64_prologue_cache *cache)
static void pass_on_stack(struct aarch64_call_info *info, struct type *type, struct value *arg)
static struct value * aarch64_dwarf2_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static int pass_in_v(struct gdbarch *gdbarch, struct regcache *regcache, struct aarch64_call_info *info, int len, const bfd_byte *buf)
static struct aarch64_prologue_cache * aarch64_make_stub_cache(frame_info_ptr this_frame, void **this_cache)
static enum unwind_stop_reason aarch64_stub_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
static unsigned int aarch64_record_load_store(aarch64_insn_decode_record *aarch64_insn_r)
static const char *const aarch64_v_register_names[]
static void aarch64_prologue_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static void aarch64_make_prologue_cache_1(frame_info_ptr this_frame, struct aarch64_prologue_cache *cache)
static struct value * aarch64_pseudo_read_value_1(struct gdbarch *gdbarch, readable_regcache *regcache, int regnum_offset, int regsize, struct value *result_value)
static void pass_in_x_or_stack(struct gdbarch *gdbarch, struct regcache *regcache, struct aarch64_call_info *info, struct type *type, struct value *arg)
static unsigned int aarch64_record_data_proc_imm(aarch64_insn_decode_record *aarch64_insn_r)
static void show_aarch64_debug(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
static int aarch64_stub_unwind_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
static struct type * aarch64_vnb_type(struct gdbarch *gdbarch)
static CORE_ADDR aarch64_frame_align(struct gdbarch *gdbarch, CORE_ADDR sp)
static std::string aarch64_get_pc_address_flags(frame_info_ptr frame, CORE_ADDR pc)
static uint64_t aarch64_get_tdesc_vq(const struct target_desc *tdesc)
static const char *const aarch64_pauth_register_names[]
static bool pass_in_v_vfp_candidate(struct gdbarch *gdbarch, struct regcache *regcache, struct aarch64_call_info *info, struct type *arg_type, struct value *arg)
static CORE_ADDR aarch64_normal_frame_base(frame_info_ptr this_frame, void **this_cache)
static const char *const aarch64_sve_register_names[]
aarch64_features aarch64_features_from_target_desc(const struct target_desc *tdesc)
static CORE_ADDR aarch64_frame_unmask_lr(aarch64_gdbarch_tdep *tdep, frame_info_ptr this_frame, CORE_ADDR addr)
bool aarch64_displaced_step_hw_singlestep(struct gdbarch *gdbarch)
static frame_unwind aarch64_prologue_unwind
static int aarch64_cannot_store_register(struct gdbarch *gdbarch, int regnum)
static void aarch64_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, frame_info_ptr this_frame)
static struct aarch64_prologue_cache * aarch64_make_prologue_cache(frame_info_ptr this_frame, void **this_cache)
static struct type * aarch64_vnh_type(struct gdbarch *gdbarch)
static struct type * aarch64_vnq_type(struct gdbarch *gdbarch)
static constexpr uint32_t BRK_INSN_BASE
static void aarch64_displaced_step_tb(const int32_t offset, int is_tbnz, const unsigned rt, unsigned bit, struct aarch64_insn_data *data)
static const char * aarch64_pseudo_register_name(struct gdbarch *gdbarch, int regnum)
static struct type * aarch64_vns_type(struct gdbarch *gdbarch)
static enum return_value_convention aarch64_return_value(struct gdbarch *gdbarch, struct value *func_value, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
const target_desc * aarch64_read_description(const aarch64_features &features)
static void aarch64_dump_tdep(struct gdbarch *gdbarch, struct ui_file *file)
static void deallocate_reg_mem(aarch64_insn_decode_record *record)
static void aarch64_displaced_step_b_cond(const unsigned cond, const int32_t offset, struct aarch64_insn_data *data)
static const unsigned char op_lit1
@ AARCH64_RECORD_UNSUPPORTED
static struct gdbarch * aarch64_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static bool is_w_pseudo_register(struct gdbarch *gdbarch, int regnum)
static enum unwind_stop_reason aarch64_prologue_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
static const char *const aarch64_r_register_names[]
static unsigned int aarch64_record_decode_insn_handler(aarch64_insn_decode_record *aarch64_insn_r)
static unsigned int aarch64_record_data_proc_reg(aarch64_insn_decode_record *aarch64_insn_r)
static unsigned int aarch64_record_asimd_load_store(aarch64_insn_decode_record *aarch64_insn_r)
int aarch64_process_record(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR insn_addr)
void aarch64_displaced_step_fixup(struct gdbarch *gdbarch, struct displaced_step_copy_insn_closure *dsc_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
static void aarch64_pseudo_write_1(struct gdbarch *gdbarch, struct regcache *regcache, int regnum_offset, int regsize, const gdb_byte *buf)
static CORE_ADDR aarch64_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static struct type * aarch64_vnv_type(struct gdbarch *gdbarch)
static void aarch64_displaced_step_ldr_literal(const int32_t offset, const int is_sw, const unsigned rt, const int is64, struct aarch64_insn_data *data)
static std::vector< CORE_ADDR > aarch64_software_single_step(struct regcache *regcache)
static bool aarch64_execute_dwarf_cfa_vendor_op(struct gdbarch *gdbarch, gdb_byte op, struct dwarf2_frame_state *fs)
static frame_base aarch64_normal_base
static int aarch64_get_longjmp_target(frame_info_ptr frame, CORE_ADDR *pc)
static frame_unwind aarch64_stub_unwind
static unsigned int aarch64_record_branch_except_sys(aarch64_insn_decode_record *aarch64_insn_r)
static bool aarch64_program_breakpoint_here_p(gdbarch *gdbarch, CORE_ADDR address)
static const char *const aarch64_mte_register_names[]
static struct type * aarch64_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
static CORE_ADDR aarch64_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
static const struct @0 aarch64_register_aliases[]
static int aarch64_return_in_memory(struct gdbarch *gdbarch, struct type *type)
static void aarch64_gen_return_address(struct gdbarch *gdbarch, struct agent_expr *ax, struct axs_value *value, CORE_ADDR scope)
#define AARCH64_DISPLACED_MODIFIED_INSNS
#define AARCH64_DWARF_RA_SIGN_STATE
#define AARCH64_DWARF_SVE_Z0
#define AARCH64_D_REGISTER_COUNT
#define AARCH64_DWARF_SVE_VG
#define AARCH64_DWARF_SVE_FFR
#define AARCH64_X_REGISTER_COUNT
#define AARCH64_DWARF_SVE_P0
target_desc * aarch64_create_target_description(const aarch64_features &features)
#define AARCH64_Q0_REGNUM
#define AARCH64_H0_REGNUM
#define AARCH64_PAUTH_CMASK_REGNUM(pauth_reg_base)
#define sve_vq_from_vl(vl)
#define AARCH64_SVE_V0_REGNUM
@ AARCH64_STRUCT_RETURN_REGNUM
#define AARCH64_B0_REGNUM
#define AARCH64_S0_REGNUM
#define AARCH64_MAX_SVE_VQ
#define AARCH64_D0_REGNUM
#define AARCH64_V_REGS_NUM
#define AARCH64_PAUTH_DMASK_REGNUM(pauth_reg_base)
gdb_static_assert(sizeof(splay_tree_key) >=sizeof(CORE_ADDR *))
int default_print_insn(bfd_vma memaddr, disassemble_info *info)
static std::vector< const char * > arches
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
struct gdbarch * gdbarch_find_by_info(struct gdbarch_info info)
#define BP_MANIPULATION(BREAK_INSN)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
bool find_reg(struct gdbarch *gdbarch, int reg, CORE_ADDR *offset_p)
bool store_would_trash(pv_t addr)
void store(pv_t addr, CORE_ADDR size, pv_t value)
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status raw_read_part(int regnum, int offset, int len, gdb_byte *buf)
enum register_status cooked_read(int regnum, gdb_byte *buf)
void cooked_write(int regnum, const gdb_byte *buf)
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
struct cmd_list_element * showdebuglist
struct cmd_list_element * setdebuglist
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
void write_memory_unsigned_integer(CORE_ADDR addr, int len, enum bfd_endian byte_order, ULONGEST value)
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
int safe_read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order, ULONGEST *return_value)
ULONGEST read_code_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
static void store_signed_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, LONGEST val)
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
@ RETURN_VALUE_ABI_RETURNS_ADDRESS
@ RETURN_VALUE_REGISTER_CONVENTION
#define displaced_debug_printf(fmt,...)
std::unique_ptr< displaced_step_copy_insn_closure > displaced_step_copy_insn_closure_up
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, frame_info_ptr))
@ DWARF2_FRAME_REG_SAVED_VAL_EXP
@ DWARF2_FRAME_REG_SAME_VALUE
ssize_t read(int fd, void *buf, size_t count)
struct value * value_of_register(int regnum, frame_info_ptr frame)
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
ULONGEST frame_unwind_register_unsigned(frame_info_ptr next_frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
bool get_frame_pc_masked(frame_info_ptr frame)
struct frame_id frame_id_build_unavailable_stack(CORE_ADDR code_addr)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
void set_frame_previous_pc_masked(frame_info_ptr frame)
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
#define FRAME_OBSTACK_ZALLOC(TYPE)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
void set_gdbarch_gen_return_address(struct gdbarch *gdbarch, gdbarch_gen_return_address_ftype *gen_return_address)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_pseudo_register_read_value(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_value_ftype *pseudo_register_read_value)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_program_breakpoint_here_p(struct gdbarch *gdbarch, gdbarch_program_breakpoint_here_p_ftype *program_breakpoint_here_p)
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype *get_longjmp_target)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
int gdbarch_addr_bit(struct gdbarch *gdbarch)
void set_gdbarch_get_pc_address_flags(struct gdbarch *gdbarch, gdbarch_get_pc_address_flags_ftype *get_pc_address_flags)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_execute_dwarf_cfa_vendor_op(struct gdbarch *gdbarch, gdbarch_execute_dwarf_cfa_vendor_op_ftype *execute_dwarf_cfa_vendor_op)
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_long_double_format(struct gdbarch *gdbarch, const struct floatformat **long_double_format)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
void set_gdbarch_print_insn(struct gdbarch *gdbarch, gdbarch_print_insn_ftype *print_insn)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
void set_gdbarch_type_align(struct gdbarch *gdbarch, gdbarch_type_align_ftype *type_align)
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype *cannot_store_register)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
void set_gdbarch_float_format(struct gdbarch *gdbarch, const struct floatformat **float_format)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_vbit_in_delta(struct gdbarch *gdbarch, int vbit_in_delta)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
function_call_return_method
@ return_method_hidden_param
struct type * lookup_pointer_type(struct type *type)
int field_is_static(struct field *f)
struct type * arch_composite_type(struct gdbarch *gdbarch, const char *name, enum type_code code)
const struct floatformat * floatformats_ieee_quad[BFD_ENDIAN_UNKNOWN]
struct type * init_vector_type(struct type *elt_type, int n)
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
unsigned type_align(struct type *type)
const struct floatformat * floatformats_ieee_double[BFD_ENDIAN_UNKNOWN]
void append_composite_type_field(struct type *t, const char *name, struct type *field)
bool is_fixed_point_type(struct type *type)
struct type * check_typedef(struct type *type)
#define TYPE_IS_REFERENCE(t)
struct language_pass_by_ref_info language_pass_by_reference(struct type *type)
static int in_plt_section(CORE_ADDR pc)
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
pv_t pv_subtract(pv_t a, pv_t b)
pv_t pv_constant(CORE_ADDR k)
pv_t pv_register(int reg, CORE_ADDR k)
pv_t pv_add_constant(pv_t v, CORE_ADDR k)
int pv_is_register(pv_t a, int r)
int record_full_arch_list_add_reg(struct regcache *regcache, int regnum)
int record_full_arch_list_add_mem(CORE_ADDR addr, int len)
int record_full_arch_list_add_end(void)
unsigned int record_debug
CORE_ADDR regcache_read_pc(struct regcache *regcache)
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
int register_size(struct gdbarch *gdbarch, int regnum)
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
struct type * register_type(struct gdbarch *gdbarch, int regnum)
const reggroup *const float_reggroup
const reggroup *const all_reggroup
const reggroup *const vector_reggroup
std::vector< stack_item_t > si
uint32_t insn_buf[AARCH64_DISPLACED_MODIFIED_INSNS]
struct aarch64_insn_data base
aarch64_displaced_step_copy_insn_closure * dsc
int(* aarch64_syscall_record)(struct regcache *regcache, unsigned long svc_number)
struct aarch64_mem_r * aarch64_mems
struct regcache * regcache
trad_frame_saved_reg * saved_regs
struct type * builtin_uint16
struct type * builtin_double
struct type * builtin_int8
struct type * builtin_uint128
struct type * builtin_uint32
struct type * builtin_uint64
struct type * builtin_int64
struct type * builtin_int32
struct type * builtin_uint8
struct type * builtin_half
struct type * builtin_bfloat16
struct type * builtin_int128
struct type * builtin_int16
struct type * builtin_float
struct dwarf2_frame_state_reg::@42::@43 exp
enum dwarf2_frame_reg_rule how
union dwarf2_frame_state_reg::@42 loc
struct type * type() const
std::vector< tdesc_feature_up > features
void set_addr(LONGEST addr)
void set_value(LONGEST val)
struct type * target_type() const
struct field & field(int idx) const
struct value::@195::@196 reg
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
void set_tdesc_pseudo_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *pseudo_name)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
int tdesc_register_bitsize(const struct tdesc_feature *feature, const char *name)
int tdesc_unnumbered_register(const struct tdesc_feature *feature, const char *name)
void set_tdesc_pseudo_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *pseudo_reggroup_p)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
scoped_restore_tmpl< int > make_scoped_restore_show_memory_breakpoints(int show)
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
void trad_frame_reset_saved_regs(struct gdbarch *gdbarch, trad_frame_saved_reg *regs)
void user_reg_add(struct gdbarch *gdbarch, const char *name, user_reg_read_ftype *xread, const void *baton)
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
void gdb_printf(struct ui_file *stream, const char *format,...)
struct value * value_cast(struct type *type, struct value *arg2)
struct type * value_type(const struct value *value)
struct value * allocate_value(struct type *type)
struct value * value_primitive_field(struct value *arg1, LONGEST offset, int fieldno, struct type *arg_type)
void mark_value_bytes_unavailable(struct value *value, LONGEST offset, LONGEST length)
gdb::array_view< gdb_byte > value_contents_raw(struct value *value)
gdb::array_view< const gdb_byte > value_contents(struct value *value)
struct value * value_from_pointer(struct type *type, CORE_ADDR addr)
LONGEST unpack_long(struct type *type, const gdb_byte *valaddr)
#define VALUE_REGNUM(val)