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/tmp/gdb-13.1/gdb/csky-tdep.c
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1/* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2023 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22#include "defs.h"
23#include "gdbsupport/gdb_assert.h"
24#include "frame.h"
25#include "inferior.h"
26#include "symtab.h"
27#include "value.h"
28#include "gdbcmd.h"
29#include "language.h"
30#include "gdbcore.h"
31#include "symfile.h"
32#include "objfiles.h"
33#include "gdbtypes.h"
34#include "target.h"
35#include "arch-utils.h"
36#include "regcache.h"
37#include "osabi.h"
38#include "block.h"
39#include "reggroups.h"
40#include "elf/csky.h"
41#include "elf-bfd.h"
42#include "symcat.h"
43#include "sim-regno.h"
44#include "dis-asm.h"
45#include "frame-unwind.h"
46#include "frame-base.h"
47#include "trad-frame.h"
48#include "infcall.h"
49#include "floatformat.h"
50#include "remote.h"
51#include "target-descriptions.h"
52#include "dwarf2/frame.h"
53#include "user-regs.h"
54#include "valprint.h"
55#include "csky-tdep.h"
56#include "regset.h"
57#include "opcode/csky.h"
58#include <algorithm>
59#include <vector>
60
61/* Control debugging information emitted in this file. */
62
63static bool csky_debug = false;
64
65static const reggroup *cr_reggroup;
66static const reggroup *fr_reggroup;
67static const reggroup *vr_reggroup;
68static const reggroup *mmu_reggroup;
69static const reggroup *prof_reggroup;
70
71static const char *csky_supported_tdesc_feature_names[] = {
72 (const char *)"org.gnu.csky.abiv2.gpr",
73 (const char *)"org.gnu.csky.abiv2.fpu",
74 (const char *)"org.gnu.csky.abiv2.cr",
75 (const char *)"org.gnu.csky.abiv2.fvcr",
76 (const char *)"org.gnu.csky.abiv2.mmu",
77 (const char *)"org.gnu.csky.abiv2.tee",
78 (const char *)"org.gnu.csky.abiv2.fpu2",
79 (const char *)"org.gnu.csky.abiv2.bank0",
80 (const char *)"org.gnu.csky.abiv2.bank1",
81 (const char *)"org.gnu.csky.abiv2.bank2",
82 (const char *)"org.gnu.csky.abiv2.bank3",
83 (const char *)"org.gnu.csky.abiv2.bank4",
84 (const char *)"org.gnu.csky.abiv2.bank5",
85 (const char *)"org.gnu.csky.abiv2.bank6",
86 (const char *)"org.gnu.csky.abiv2.bank7",
87 (const char *)"org.gnu.csky.abiv2.bank8",
88 (const char *)"org.gnu.csky.abiv2.bank9",
89 (const char *)"org.gnu.csky.abiv2.bank10",
90 (const char *)"org.gnu.csky.abiv2.bank11",
91 (const char *)"org.gnu.csky.abiv2.bank12",
92 (const char *)"org.gnu.csky.abiv2.bank13",
93 (const char *)"org.gnu.csky.abiv2.bank14",
94 (const char *)"org.gnu.csky.abiv2.bank15",
95 (const char *)"org.gnu.csky.abiv2.bank16",
96 (const char *)"org.gnu.csky.abiv2.bank17",
97 (const char *)"org.gnu.csky.abiv2.bank18",
98 (const char *)"org.gnu.csky.abiv2.bank19",
99 (const char *)"org.gnu.csky.abiv2.bank20",
100 (const char *)"org.gnu.csky.abiv2.bank21",
101 (const char *)"org.gnu.csky.abiv2.bank22",
102 (const char *)"org.gnu.csky.abiv2.bank23",
103 (const char *)"org.gnu.csky.abiv2.bank24",
104 (const char *)"org.gnu.csky.abiv2.bank25",
105 (const char *)"org.gnu.csky.abiv2.bank26",
106 (const char *)"org.gnu.csky.abiv2.bank27",
107 (const char *)"org.gnu.csky.abiv2.bank28",
108 (const char *)"org.gnu.csky.abiv2.bank29",
109 (const char *)"org.gnu.csky.abiv2.bank30",
110 (const char *)"org.gnu.csky.abiv2.bank31"
111};
112
114{
115 char name[16];
116 int num;
117};
118
120 {"r0", 0},
121 {"r1", 1},
122 {"r2", 2},
123 {"r3", 3},
124 {"r4", 4},
125 {"r5", 5},
126 {"r6", 6},
127 {"r7", 7},
128 {"r8", 8},
129 {"r9", 9},
130 {"r10", 10},
131 {"r11", 11},
132 {"r12", 12},
133 {"r13", 13},
134 {"r14", 14},
135 {"r15", 15},
136 {"r16", 16},
137 {"r17", 17},
138 {"r18", 18},
139 {"r19", 19},
140 {"r20", 20},
141 {"r21", 21},
142 {"r22", 22},
143 {"r23", 23},
144 {"r24", 24},
145 {"r25", 25},
146 {"r26", 26},
147 {"r27", 27},
148 {"r28", 28},
149 {"r28", 28},
150 {"r29", 29},
151 {"r30", 30},
152 {"r31", 31},
153 {"hi", CSKY_HI_REGNUM},
154 {"lo", CSKY_LO_REGNUM},
155 {"pc", CSKY_PC_REGNUM}
156};
157
159 /* fr0~fr15. */
160 {"fr0", CSKY_FR0_REGNUM + 0},
161 {"fr1", CSKY_FR0_REGNUM + 1},
162 {"fr2", CSKY_FR0_REGNUM + 2},
163 {"fr3", CSKY_FR0_REGNUM + 3},
164 {"fr4", CSKY_FR0_REGNUM + 4},
165 {"fr5", CSKY_FR0_REGNUM + 5},
166 {"fr6", CSKY_FR0_REGNUM + 6},
167 {"fr7", CSKY_FR0_REGNUM + 7},
168 {"fr8", CSKY_FR0_REGNUM + 8},
169 {"fr9", CSKY_FR0_REGNUM + 9},
170 {"fr10", CSKY_FR0_REGNUM + 10},
171 {"fr11", CSKY_FR0_REGNUM + 11},
172 {"fr12", CSKY_FR0_REGNUM + 12},
173 {"fr13", CSKY_FR0_REGNUM + 13},
174 {"fr14", CSKY_FR0_REGNUM + 14},
175 {"fr15", CSKY_FR0_REGNUM + 15},
176 /* fr16~fr31. */
177 {"fr16", CSKY_FR16_REGNUM + 0},
178 {"fr17", CSKY_FR16_REGNUM + 1},
179 {"fr18", CSKY_FR16_REGNUM + 2},
180 {"fr19", CSKY_FR16_REGNUM + 3},
181 {"fr20", CSKY_FR16_REGNUM + 4},
182 {"fr21", CSKY_FR16_REGNUM + 5},
183 {"fr22", CSKY_FR16_REGNUM + 6},
184 {"fr23", CSKY_FR16_REGNUM + 7},
185 {"fr24", CSKY_FR16_REGNUM + 8},
186 {"fr25", CSKY_FR16_REGNUM + 9},
187 {"fr26", CSKY_FR16_REGNUM + 10},
188 {"fr27", CSKY_FR16_REGNUM + 11},
189 {"fr28", CSKY_FR16_REGNUM + 12},
190 {"fr29", CSKY_FR16_REGNUM + 13},
191 {"fr30", CSKY_FR16_REGNUM + 14},
192 {"fr31", CSKY_FR16_REGNUM + 15},
193 /* vr0~vr15. */
194 {"vr0", CSKY_VR0_REGNUM + 0},
195 {"vr1", CSKY_VR0_REGNUM + 1},
196 {"vr2", CSKY_VR0_REGNUM + 2},
197 {"vr3", CSKY_VR0_REGNUM + 3},
198 {"vr4", CSKY_VR0_REGNUM + 4},
199 {"vr5", CSKY_VR0_REGNUM + 5},
200 {"vr6", CSKY_VR0_REGNUM + 6},
201 {"vr7", CSKY_VR0_REGNUM + 7},
202 {"vr8", CSKY_VR0_REGNUM + 8},
203 {"vr9", CSKY_VR0_REGNUM + 9},
204 {"vr10", CSKY_VR0_REGNUM + 10},
205 {"vr11", CSKY_VR0_REGNUM + 11},
206 {"vr12", CSKY_VR0_REGNUM + 12},
207 {"vr13", CSKY_VR0_REGNUM + 13},
208 {"vr14", CSKY_VR0_REGNUM + 14},
209 {"vr15", CSKY_VR0_REGNUM + 15},
210 /* fpu control registers. */
211 {"fcr", CSKY_FCR_REGNUM + 0},
212 {"fid", CSKY_FCR_REGNUM + 1},
213 {"fesr", CSKY_FCR_REGNUM + 2},
214};
215
217 {"ar0", CSKY_AR0_REGNUM + 0},
218 {"ar1", CSKY_AR0_REGNUM + 1},
219 {"ar2", CSKY_AR0_REGNUM + 2},
220 {"ar3", CSKY_AR0_REGNUM + 3},
221 {"ar4", CSKY_AR0_REGNUM + 4},
222 {"ar5", CSKY_AR0_REGNUM + 5},
223 {"ar6", CSKY_AR0_REGNUM + 6},
224 {"ar7", CSKY_AR0_REGNUM + 7},
225 {"ar8", CSKY_AR0_REGNUM + 8},
226 {"ar9", CSKY_AR0_REGNUM + 9},
227 {"ar10", CSKY_AR0_REGNUM + 10},
228 {"ar11", CSKY_AR0_REGNUM + 11},
229 {"ar12", CSKY_AR0_REGNUM + 12},
230 {"ar13", CSKY_AR0_REGNUM + 13},
231 {"ar14", CSKY_AR0_REGNUM + 14},
232 {"ar15", CSKY_AR0_REGNUM + 15},
233};
234
236 {"cr0", CSKY_CR0_REGNUM + 0},
237 {"cr1", CSKY_CR0_REGNUM + 1},
238 {"cr2", CSKY_CR0_REGNUM + 2},
239 {"cr3", CSKY_CR0_REGNUM + 3},
240 {"cr4", CSKY_CR0_REGNUM + 4},
241 {"cr5", CSKY_CR0_REGNUM + 5},
242 {"cr6", CSKY_CR0_REGNUM + 6},
243 {"cr7", CSKY_CR0_REGNUM + 7},
244 {"cr8", CSKY_CR0_REGNUM + 8},
245 {"cr9", CSKY_CR0_REGNUM + 9},
246 {"cr10", CSKY_CR0_REGNUM + 10},
247 {"cr11", CSKY_CR0_REGNUM + 11},
248 {"cr12", CSKY_CR0_REGNUM + 12},
249 {"cr13", CSKY_CR0_REGNUM + 13},
250 {"cr14", CSKY_CR0_REGNUM + 14},
251 {"cr15", CSKY_CR0_REGNUM + 15},
252 {"cr16", CSKY_CR0_REGNUM + 16},
253 {"cr17", CSKY_CR0_REGNUM + 17},
254 {"cr18", CSKY_CR0_REGNUM + 18},
255 {"cr19", CSKY_CR0_REGNUM + 19},
256 {"cr20", CSKY_CR0_REGNUM + 20},
257 {"cr21", CSKY_CR0_REGNUM + 21},
258 {"cr22", CSKY_CR0_REGNUM + 22},
259 {"cr23", CSKY_CR0_REGNUM + 23},
260 {"cr24", CSKY_CR0_REGNUM + 24},
261 {"cr25", CSKY_CR0_REGNUM + 25},
262 {"cr26", CSKY_CR0_REGNUM + 26},
263 {"cr27", CSKY_CR0_REGNUM + 27},
264 {"cr28", CSKY_CR0_REGNUM + 28},
265 {"cr29", CSKY_CR0_REGNUM + 29},
266 {"cr30", CSKY_CR0_REGNUM + 30},
267 {"cr31", CSKY_CR0_REGNUM + 31}
268};
269
271 {"mcr0", 128},
272 {"mcr2", 129},
273 {"mcr3", 130},
274 {"mcr4", 131},
275 {"mcr6", 132},
276 {"mcr8", 133},
277 {"mcr29", 134},
278 {"mcr30", 135},
279 {"mcr31", 136}
280};
281
283 {"cp15cp1", 253},
284 {"cp15cp5", 254},
285 {"cp15cp7", 255},
286 {"cp15cp9", 256},
287 {"cp15cp10", 257},
288 {"cp15cp11", 258},
289 {"cp15cp12", 259},
290 {"cp15cp13", 260},
291 {"cp15cp14", 261},
292 {"cp15cp15", 262},
293 {"cp15cp16", 263},
294 {"cp15cp17", 264},
295 {"cp15cp18", 265},
296 {"cp15cp19", 266},
297 {"cp15cp20", 267},
298 {"cp15cp21", 268},
299 {"cp15cp22", 269},
300 {"cp15cp23", 270},
301 {"cp15cp24", 271},
302 {"cp15cp25", 272},
303 {"cp15cp26", 273},
304 {"cp15cp27", 274},
305 {"cp15cp28", 275},
306};
307
309 /* Alias register names for Bank0. */
310 {"psr", CSKY_CR0_REGNUM + 0},
311 {"vbr", CSKY_CR0_REGNUM + 1},
312 {"epsr", CSKY_CR0_REGNUM + 2},
313 {"fpsr", CSKY_CR0_REGNUM + 3},
314 {"epc", CSKY_CR0_REGNUM + 4},
315 {"fpc", CSKY_CR0_REGNUM + 5},
316 {"ss0", CSKY_CR0_REGNUM + 6},
317 {"ss1", CSKY_CR0_REGNUM + 7},
318 {"ss2", CSKY_CR0_REGNUM + 8},
319 {"ss3", CSKY_CR0_REGNUM + 9},
320 {"ss4", CSKY_CR0_REGNUM + 10},
321 {"gcr", CSKY_CR0_REGNUM + 11},
322 {"gsr", CSKY_CR0_REGNUM + 12},
323 {"cpuid", CSKY_CR0_REGNUM + 13},
324 {"ccr", CSKY_CR0_REGNUM + 18},
325 {"capr", CSKY_CR0_REGNUM + 19},
326 {"pacr", CSKY_CR0_REGNUM + 20},
327 {"prsr", CSKY_CR0_REGNUM + 21},
328 {"chr", CSKY_CR0_REGNUM + 31},
329 /* Alias register names for MMU. */
330 {"mir", 128},
331 {"mel0", 129},
332 {"mel1", 130},
333 {"meh", 131},
334 {"mpr", 132},
335 {"mcir", 133},
336 {"mpgd", 134},
337 {"msa0", 135},
338 {"msa1", 136},
339 /* Alias register names for Bank1. */
340 {"ebr", 190},
341 {"errlc", 195},
342 {"erraddr", 196},
343 {"errsts", 197},
344 {"errinj", 198},
345 {"usp", 203},
346 {"int_sp", 204},
347 {"itcmcr", 211},
348 {"dtcmcr", 212},
349 {"cindex", 215},
350 {"cdata0", 216},
351 {"cdata1", 217},
352 {"cdata2", 218},
353 {"cins", 220},
354 /* Alias register names for Bank3. */
355 {"sepsr", 221},
356 {"t_wssr", 221},
357 {"sevbr", 222},
358 {"t_wrcr", 222},
359 {"seepsr", 223},
360 {"seepc", 225},
361 {"nsssp", 227},
362 {"t_usp", 228},
363 {"dcr", 229},
364 {"t_pcr", 230},
365};
366
367/* Functions declaration. */
368
369static const char *
370csky_pseudo_register_name (struct gdbarch *gdbarch, int regno);
371
372/* Get csky supported registers's count for tdesc xml. */
373
374static int
376{
377 int count = 0;
378 count += ARRAY_SIZE (csky_supported_gpr_regs);
379 count += ARRAY_SIZE (csky_supported_fpu_regs);
380 count += ARRAY_SIZE (csky_supported_ar_regs);
381 count += ARRAY_SIZE (csky_supported_bank0_regs);
382 count += ARRAY_SIZE (csky_supported_mmu_regs);
383 count += ARRAY_SIZE (csky_supported_bank15_regs);
384 count += ARRAY_SIZE (csky_supported_alias_regs);
385 /* Bank1~Bank14, Bank16~Bank31. */
386 count += 32 * (14 + 16);
387 return count;
388}
389
390/* Return a supported register according to index. */
391
392static const struct csky_supported_tdesc_register *
394{
395 static struct csky_supported_tdesc_register tdesc_reg;
396 int count = 0;
397 int multi, remain;
398 int count_gpr = ARRAY_SIZE (csky_supported_gpr_regs);
399 int count_fpu = ARRAY_SIZE (csky_supported_fpu_regs);
400 int count_ar = ARRAY_SIZE (csky_supported_ar_regs);
401 int count_bank0 = ARRAY_SIZE (csky_supported_bank0_regs);
402 int count_mmu = ARRAY_SIZE (csky_supported_mmu_regs);
403 int count_bank15 = ARRAY_SIZE (csky_supported_bank15_regs);
404 int count_alias = ARRAY_SIZE (csky_supported_alias_regs);
405
406 count = count_gpr;
407 if (index < count)
408 return &csky_supported_gpr_regs[index];
409 if (index < (count + count_fpu))
410 return &csky_supported_fpu_regs[index - count];
411 count += count_fpu;
412 if (index < (count + count_ar))
413 return &csky_supported_ar_regs[index - count];
414 count += count_ar;
415 if (index < (count + count_bank0))
416 return &csky_supported_bank0_regs[index - count];
417 count += count_bank0;
418 if (index < (count + count_mmu))
419 return &csky_supported_mmu_regs[index - count];
420 count += count_mmu;
421 if (index < (count + count_bank15))
422 return &csky_supported_bank15_regs[index - count];
423 count += count_bank15;
424 if (index < (count + count_alias))
425 return &csky_supported_alias_regs[index - count];
426 count += count_alias;
427 index -= count;
428 multi = index / 32;
429 remain = index % 32;
430 switch (multi)
431 {
432 case 0: /* Bank1. */
433 {
434 sprintf (tdesc_reg.name, "cp1cr%d", remain);
435 tdesc_reg.num = 189 + remain;
436 }
437 break;
438 case 1: /* Bank2. */
439 {
440 sprintf (tdesc_reg.name, "cp2cr%d", remain);
441 tdesc_reg.num = 276 + remain;
442 }
443 break;
444 case 2: /* Bank3. */
445 {
446 sprintf (tdesc_reg.name, "cp3cr%d", remain);
447 tdesc_reg.num = 221 + remain;
448 }
449 break;
450 case 3: /* Bank4. */
451 case 4: /* Bank5. */
452 case 5: /* Bank6. */
453 case 6: /* Bank7. */
454 case 7: /* Bank8. */
455 case 8: /* Bank9. */
456 case 9: /* Bank10. */
457 case 10: /* Bank11. */
458 case 11: /* Bank12. */
459 case 12: /* Bank13. */
460 case 13: /* Bank14. */
461 {
462 /* Regitsers in Bank4~14 have continuous regno with start 308. */
463 sprintf (tdesc_reg.name, "cp%dcr%d", (multi + 1), remain);
464 tdesc_reg.num = 308 + ((multi - 3) * 32) + remain;
465 }
466 break;
467 case 14: /* Bank16. */
468 case 15: /* Bank17. */
469 case 16: /* Bank18. */
470 case 17: /* Bank19. */
471 case 18: /* Bank20. */
472 case 19: /* Bank21. */
473 case 20: /* Bank22. */
474 case 21: /* Bank23. */
475 case 22: /* Bank24. */
476 case 23: /* Bank25. */
477 case 24: /* Bank26. */
478 case 25: /* Bank27. */
479 case 26: /* Bank28. */
480 case 27: /* Bank29. */
481 case 28: /* Bank30. */
482 case 29: /* Bank31. */
483 {
484 /* Regitsers in Bank16~31 have continuous regno with start 660. */
485 sprintf (tdesc_reg.name, "cp%dcr%d", (multi + 2), remain);
486 tdesc_reg.num = 660 + ((multi - 14) * 32) + remain;
487 }
488 break;
489 default:
490 return NULL;
491 }
492 return &tdesc_reg;
493}
494
495/* Convenience function to print debug messages in prologue analysis. */
496
497static void
498print_savedreg_msg (int regno, int offsets[], bool print_continuing)
499{
500 gdb_printf (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
501 regno, offsets[regno]);
502 if (print_continuing)
503 gdb_printf (gdb_stdlog, "csky: continuing\n");
504}
505
506/* Check whether the instruction at ADDR is 16-bit or not. */
507
508static int
509csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
510{
511 gdb_byte target_mem[2];
512 int status;
513 unsigned int insn;
514 int ret = 1;
515 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
516
517 status = target_read_memory (addr, target_mem, 2);
518 /* Assume a 16-bit instruction if we can't read memory. */
519 if (status)
520 return 1;
521
522 /* Get instruction from memory. */
523 insn = extract_unsigned_integer (target_mem, 2, byte_order);
524 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
525 ret = 0;
526 else if (insn == CSKY_BKPT_INSN)
527 {
528 /* Check for 32-bit bkpt instruction which is all 0. */
529 status = target_read_memory (addr + 2, target_mem, 2);
530 if (status)
531 return 1;
532
533 insn = extract_unsigned_integer (target_mem, 2, byte_order);
534 if (insn == CSKY_BKPT_INSN)
535 ret = 0;
536 }
537 return ret;
538}
539
540/* Get one instruction at ADDR and store it in INSN. Return 2 for
541 a 16-bit instruction or 4 for a 32-bit instruction. */
542
543static int
544csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
545{
546 gdb_byte target_mem[2];
547 unsigned int insn_type;
548 int status;
549 int insn_len = 2;
550 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
551
552 status = target_read_memory (addr, target_mem, 2);
553 if (status)
555
556 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
557 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
558 {
559 status = target_read_memory (addr + 2, target_mem, 2);
560 if (status)
562 insn_type = ((insn_type << 16)
563 | extract_unsigned_integer (target_mem, 2, byte_order));
564 insn_len = 4;
565 }
566 *insn = insn_type;
567 return insn_len;
568}
569
570/* Implement the read_pc gdbarch method. */
571
572static CORE_ADDR
574{
575 ULONGEST pc;
577 return pc;
578}
579
580/* Implement the write_pc gdbarch method. */
581
582static void
584{
586}
587
588/* C-Sky ABI register names. */
589
590static const char * const csky_register_names[] =
591{
592 /* General registers 0 - 31. */
593 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
594 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
595 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
596 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
597
598 /* DSP hilo registers 36 and 37. */
599 "", "", "", "", "hi", "lo", "", "",
600
601 /* FPU/VPU general registers 40 - 71. */
602 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
603 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
604 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
605 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
606
607 /* Program counter 72. */
608 "pc",
609
610 /* Optional registers (ar) 73 - 88. */
611 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
612 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
613
614 /* Control registers (cr) 89 - 119. */
615 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
616 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
617 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
618 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
619
620 /* FPU/VPU control registers 121 ~ 123. */
621 /* User sp 127. */
622 "fid", "fcr", "fesr", "", "", "", "usp",
623
624 /* MMU control registers: 128 - 136. */
625 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
626 "mcr31", "", "", "",
627
628 /* Profiling control registers 140 - 143. */
629 /* Profiling software general registers 144 - 157. */
630 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
631 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
632 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
633 "", "",
634
635 /* Profiling architecture general registers 160 - 174. */
636 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
637 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
638 "profagr12","profagr13","profagr14", "",
639
640 /* Profiling extension general registers 176 - 188. */
641 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
642 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
643 "profxgr12",
644
645 /* Control registers in bank1. */
646 "", "", "", "", "", "", "", "",
647 "", "", "", "", "", "", "", "",
648 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
649 "", "", "", "", "", "", "", "",
650
651 /* Control registers in bank3 (ICE). */
652 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
653 "sedcr", "", "", "", "", "", "", "",
654 "", "", "", "", "", "", "", "",
655 "", "", "", "", "", "", "", ""
656};
657
658/* Implement the register_name gdbarch method. */
659
660static const char *
661csky_register_name (struct gdbarch *gdbarch, int reg_nr)
662{
663 if (reg_nr >= gdbarch_num_regs (gdbarch))
664 return csky_pseudo_register_name (gdbarch, reg_nr);
665
667 return tdesc_register_name (gdbarch, reg_nr);
668
669 return csky_register_names[reg_nr];
670}
671
672/* Construct vector type for vrx registers. */
673
674static struct type *
676{
677 const struct builtin_type *bt = builtin_type (gdbarch);
678
679 struct type *t;
680
681 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
682 TYPE_CODE_UNION);
683
690
691 t->set_is_vector (true);
692 t->set_name ("builtin_type_vec128i");
693
694 return t;
695}
696
697/* Return the GDB type object for the "standard" data type
698 of data in register N. */
699
700static struct type *
701csky_register_type (struct gdbarch *gdbarch, int reg_nr)
702{
703 int num_regs = gdbarch_num_regs (gdbarch);
705 = gdbarch_tdep<csky_gdbarch_tdep> (gdbarch);
706
708 {
709 if ((reg_nr >= num_regs)
710 && (reg_nr < (num_regs + tdep->fv_pseudo_registers_count)))
712 }
713
714 /* Vector register has 128 bits, and only in ck810. Just return
715 csky_vector_type(), not check tdesc_has_registers(), is in case
716 of some GDB stub does not describe type for Vector resgisters
717 in the target-description-xml. */
718 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
719 return csky_vector_type (gdbarch);
720
721 /* If type has been described in tdesc-xml, use it. */
723 {
724 struct type *tdesc_t = tdesc_register_type (gdbarch, reg_nr);
725 if (tdesc_t)
726 return tdesc_t;
727 }
728
729 /* PC, EPC, FPC is a text pointer. */
730 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
731 || (reg_nr == CSKY_FPC_REGNUM))
733
734 /* VBR is a data pointer. */
735 if (reg_nr == CSKY_VBR_REGNUM)
737
738 /* Float register has 64 bits, and only in ck810. */
739 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
740 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
742
743 /* Profiling general register has 48 bits, we use 64bit. */
744 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
746
747 if (reg_nr == CSKY_SP_REGNUM)
749
750 /* Others are 32 bits. */
752}
753
754/* Data structure to marshall items in a dummy stack frame when
755 calling a function in the inferior. */
756
758{
759 csky_stack_item (int len_, const gdb_byte *data_)
760 : len (len_), data (data_)
761 {}
762
763 int len;
764 const gdb_byte *data;
765};
766
767/* Implement the push_dummy_call gdbarch method. */
768
769static CORE_ADDR
770csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
771 struct regcache *regcache, CORE_ADDR bp_addr,
772 int nargs, struct value **args, CORE_ADDR sp,
773 function_call_return_method return_method,
774 CORE_ADDR struct_addr)
775{
776 int argnum;
777 int argreg = CSKY_ABI_A0_REGNUM;
778 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
779 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
780 std::vector<csky_stack_item> stack_items;
781
782 /* Set the return address. For CSKY, the return breakpoint is
783 always at BP_ADDR. */
785
786 /* The struct_return pointer occupies the first parameter
787 passing register. */
788 if (return_method == return_method_struct)
789 {
790 if (csky_debug)
791 {
793 "csky: struct return in %s = %s\n",
795 paddress (gdbarch, struct_addr));
796 }
797 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
798 argreg++;
799 }
800
801 /* Put parameters into argument registers in REGCACHE.
802 In ABI argument registers are r0 through r3. */
803 for (argnum = 0; argnum < nargs; argnum++)
804 {
805 int len;
806 struct type *arg_type;
807 const gdb_byte *val;
808
809 arg_type = check_typedef (value_type (args[argnum]));
810 len = arg_type->length ();
811 val = value_contents (args[argnum]).data ();
812
813 /* Copy the argument to argument registers or the dummy stack.
814 Large arguments are split between registers and stack.
815
816 If len < 4, there is no need to worry about endianness since
817 the arguments will always be stored in the low address. */
818 if (len < 4)
819 {
820 CORE_ADDR regval
821 = extract_unsigned_integer (val, len, byte_order);
823 argreg++;
824 }
825 else
826 {
827 while (len > 0)
828 {
829 int partial_len = len < 4 ? len : 4;
830 if (argreg <= last_arg_regnum)
831 {
832 /* The argument is passed in an argument register. */
833 CORE_ADDR regval
834 = extract_unsigned_integer (val, partial_len,
835 byte_order);
836 if (byte_order == BFD_ENDIAN_BIG)
837 regval <<= (4 - partial_len) * 8;
838
839 /* Put regval into register in REGCACHE. */
841 regval);
842 argreg++;
843 }
844 else
845 {
846 /* The argument should be pushed onto the dummy stack. */
847 stack_items.emplace_back (4, val);
848 }
849 len -= partial_len;
850 val += partial_len;
851 }
852 }
853 }
854
855 /* Transfer the dummy stack frame to the target. */
856 std::vector<csky_stack_item>::reverse_iterator iter;
857 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
858 {
859 sp -= iter->len;
860 write_memory (sp, iter->data, iter->len);
861 }
862
863 /* Finally, update the SP register. */
865 return sp;
866}
867
868/* Implement the return_value gdbarch method. */
869
870static enum return_value_convention
871csky_return_value (struct gdbarch *gdbarch, struct value *function,
872 struct type *valtype, struct regcache *regcache,
873 gdb_byte *readbuf, const gdb_byte *writebuf)
874{
875 CORE_ADDR regval;
876 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
877 int len = valtype->length ();
878 unsigned int ret_regnum = CSKY_RET_REGNUM;
879
880 /* Csky abi specifies that return values larger than 8 bytes
881 are put on the stack. */
882 if (len > 8)
884 else
885 {
886 if (readbuf != NULL)
887 {
888 ULONGEST tmp;
889 /* By using store_unsigned_integer we avoid having to do
890 anything special for small big-endian values. */
891 regcache->cooked_read (ret_regnum, &tmp);
892 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
893 byte_order, tmp);
894 if (len > 4)
895 {
896 regcache->cooked_read (ret_regnum + 1, &tmp);
897 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
898 }
899 }
900 if (writebuf != NULL)
901 {
902 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
903 byte_order);
904 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
905 if (len > 4)
906 {
907 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
908 4, byte_order);
910 regval);
911 }
912
913 }
915 }
916}
917
918/* Implement the frame_align gdbarch method.
919
920 Adjust the address downward (direction of stack growth) so that it
921 is correctly aligned for a new stack frame. */
922
923static CORE_ADDR
924csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
925{
926 return align_down (addr, 4);
927}
928
929/* Unwind cache used for gdbarch fallback unwinder. */
930
932{
933 /* The stack pointer at the time this frame was created; i.e. the
934 caller's stack pointer when this function was called. It is used
935 to identify this frame. */
936 CORE_ADDR prev_sp;
937
938 /* The frame base for this frame is just prev_sp - frame size.
939 FRAMESIZE is the distance from the frame pointer to the
940 initial stack pointer. */
942
943 /* The register used to hold the frame pointer for this frame. */
945
946 /* Saved register offsets. */
948};
949
950/* Do prologue analysis, returning the PC of the first instruction
951 after the function prologue. */
952
953static CORE_ADDR
955 CORE_ADDR start_pc,
956 CORE_ADDR limit_pc,
957 CORE_ADDR end_pc,
958 frame_info_ptr this_frame,
959 struct csky_unwind_cache *this_cache,
960 lr_type_t lr_type)
961{
962 CORE_ADDR addr;
963 unsigned int insn, rn;
964 int framesize = 0;
965 int stacksize = 0;
966 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
967 int insn_len;
968 /* For adjusting fp. */
969 int is_fp_saved = 0;
970 int adjust_fp = 0;
971
972 /* REGISTER_OFFSETS will contain offsets from the top of the frame
973 (NOT the frame pointer) for the various saved registers, or -1
974 if the register is not saved. */
975 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
976 register_offsets[rn] = -1;
977
978 /* Analyze the prologue. Things we determine from analyzing the
979 prologue include the size of the frame and which registers are
980 saved (and where). */
981 if (csky_debug)
982 {
984 "csky: Scanning prologue: start_pc = 0x%x,"
985 "limit_pc = 0x%x\n", (unsigned int) start_pc,
986 (unsigned int) limit_pc);
987 }
988
989 /* Default to 16 bit instruction. */
990 insn_len = 2;
991 stacksize = 0;
992 for (addr = start_pc; addr < limit_pc; addr += insn_len)
993 {
994 /* Get next insn. */
995 insn_len = csky_get_insn (gdbarch, addr, &insn);
996
997 /* Check if 32 bit. */
998 if (insn_len == 4)
999 {
1000 /* subi32 sp,sp oimm12. */
1001 if (CSKY_32_IS_SUBI0 (insn))
1002 {
1003 /* Got oimm12. */
1004 int offset = CSKY_32_SUBI_IMM (insn);
1005 if (csky_debug)
1006 {
1008 "csky: got subi sp,%d; continuing\n",
1009 offset);
1010 }
1011 stacksize += offset;
1012 continue;
1013 }
1014 /* stm32 ry-rz,(sp). */
1015 else if (CSKY_32_IS_STMx0 (insn))
1016 {
1017 /* Spill register(s). */
1018 int start_register;
1019 int reg_count;
1020 int offset;
1021
1022 /* BIG WARNING! The CKCore ABI does not restrict functions
1023 to taking only one stack allocation. Therefore, when
1024 we save a register, we record the offset of where it was
1025 saved relative to the current stacksize. This will
1026 then give an offset from the SP upon entry to our
1027 function. Remember, stacksize is NOT constant until
1028 we're done scanning the prologue. */
1029 start_register = CSKY_32_STM_VAL_REGNUM (insn);
1030 reg_count = CSKY_32_STM_SIZE (insn);
1031 if (csky_debug)
1032 {
1034 "csky: got stm r%d-r%d,(sp)\n",
1035 start_register,
1036 start_register + reg_count);
1037 }
1038
1039 for (rn = start_register, offset = 0;
1040 rn <= start_register + reg_count;
1041 rn++, offset += 4)
1042 {
1043 register_offsets[rn] = stacksize - offset;
1044 if (csky_debug)
1045 {
1047 "csky: r%d saved at 0x%x"
1048 " (offset %d)\n",
1049 rn, register_offsets[rn],
1050 offset);
1051 }
1052 }
1053 if (csky_debug)
1054 gdb_printf (gdb_stdlog, "csky: continuing\n");
1055 continue;
1056 }
1057 /* stw ry,(sp,disp). */
1058 else if (CSKY_32_IS_STWx0 (insn))
1059 {
1060 /* Spill register: see note for IS_STM above. */
1061 int disp;
1062
1063 rn = CSKY_32_ST_VAL_REGNUM (insn);
1064 disp = CSKY_32_ST_OFFSET (insn);
1065 register_offsets[rn] = stacksize - disp;
1066 if (csky_debug)
1067 print_savedreg_msg (rn, register_offsets, true);
1068 continue;
1069 }
1070 else if (CSKY_32_IS_MOV_FP_SP (insn))
1071 {
1072 /* SP is saved to FP reg, means code afer prologue may
1073 modify SP. */
1074 is_fp_saved = 1;
1075 adjust_fp = stacksize;
1076 continue;
1077 }
1078 else if (CSKY_32_IS_MFCR_EPSR (insn))
1079 {
1080 unsigned int insn2;
1081 addr += 4;
1082 int mfcr_regnum = insn & 0x1f;
1083 insn_len = csky_get_insn (gdbarch, addr, &insn2);
1084 if (insn_len == 2)
1085 {
1086 int stw_regnum = (insn2 >> 5) & 0x7;
1087 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1088 {
1089 int offset;
1090
1091 /* CSKY_EPSR_REGNUM. */
1092 rn = CSKY_NUM_GREGS;
1093 offset = CSKY_16_STWx0_OFFSET (insn2);
1094 register_offsets[rn] = stacksize - offset;
1095 if (csky_debug)
1096 print_savedreg_msg (rn, register_offsets, true);
1097 continue;
1098 }
1099 break;
1100 }
1101 else
1102 {
1103 /* INSN_LEN == 4. */
1104 int stw_regnum = (insn2 >> 21) & 0x1f;
1105 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1106 {
1107 int offset;
1108
1109 /* CSKY_EPSR_REGNUM. */
1110 rn = CSKY_NUM_GREGS;
1111 offset = CSKY_32_ST_OFFSET (insn2);
1112 register_offsets[rn] = framesize - offset;
1113 if (csky_debug)
1114 print_savedreg_msg (rn, register_offsets, true);
1115 continue;
1116 }
1117 break;
1118 }
1119 }
1120 else if (CSKY_32_IS_MFCR_FPSR (insn))
1121 {
1122 unsigned int insn2;
1123 addr += 4;
1124 int mfcr_regnum = insn & 0x1f;
1125 insn_len = csky_get_insn (gdbarch, addr, &insn2);
1126 if (insn_len == 2)
1127 {
1128 int stw_regnum = (insn2 >> 5) & 0x7;
1129 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
1130 == stw_regnum))
1131 {
1132 int offset;
1133
1134 /* CSKY_FPSR_REGNUM. */
1135 rn = CSKY_NUM_GREGS + 1;
1136 offset = CSKY_16_STWx0_OFFSET (insn2);
1137 register_offsets[rn] = stacksize - offset;
1138 if (csky_debug)
1139 print_savedreg_msg (rn, register_offsets, true);
1140 continue;
1141 }
1142 break;
1143 }
1144 else
1145 {
1146 /* INSN_LEN == 4. */
1147 int stw_regnum = (insn2 >> 21) & 0x1f;
1148 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1149 {
1150 int offset;
1151
1152 /* CSKY_FPSR_REGNUM. */
1153 rn = CSKY_NUM_GREGS + 1;
1154 offset = CSKY_32_ST_OFFSET (insn2);
1155 register_offsets[rn] = framesize - offset;
1156 if (csky_debug)
1157 print_savedreg_msg (rn, register_offsets, true);
1158 continue;
1159 }
1160 break;
1161 }
1162 }
1163 else if (CSKY_32_IS_MFCR_EPC (insn))
1164 {
1165 unsigned int insn2;
1166 addr += 4;
1167 int mfcr_regnum = insn & 0x1f;
1168 insn_len = csky_get_insn (gdbarch, addr, &insn2);
1169 if (insn_len == 2)
1170 {
1171 int stw_regnum = (insn2 >> 5) & 0x7;
1172 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1173 {
1174 int offset;
1175
1176 /* CSKY_EPC_REGNUM. */
1177 rn = CSKY_NUM_GREGS + 2;
1178 offset = CSKY_16_STWx0_OFFSET (insn2);
1179 register_offsets[rn] = stacksize - offset;
1180 if (csky_debug)
1181 print_savedreg_msg (rn, register_offsets, true);
1182 continue;
1183 }
1184 break;
1185 }
1186 else
1187 {
1188 /* INSN_LEN == 4. */
1189 int stw_regnum = (insn2 >> 21) & 0x1f;
1190 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1191 {
1192 int offset;
1193
1194 /* CSKY_EPC_REGNUM. */
1195 rn = CSKY_NUM_GREGS + 2;
1196 offset = CSKY_32_ST_OFFSET (insn2);
1197 register_offsets[rn] = framesize - offset;
1198 if (csky_debug)
1199 print_savedreg_msg (rn, register_offsets, true);
1200 continue;
1201 }
1202 break;
1203 }
1204 }
1205 else if (CSKY_32_IS_MFCR_FPC (insn))
1206 {
1207 unsigned int insn2;
1208 addr += 4;
1209 int mfcr_regnum = insn & 0x1f;
1210 insn_len = csky_get_insn (gdbarch, addr, &insn2);
1211 if (insn_len == 2)
1212 {
1213 int stw_regnum = (insn2 >> 5) & 0x7;
1214 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1215 {
1216 int offset;
1217
1218 /* CSKY_FPC_REGNUM. */
1219 rn = CSKY_NUM_GREGS + 3;
1220 offset = CSKY_16_STWx0_OFFSET (insn2);
1221 register_offsets[rn] = stacksize - offset;
1222 if (csky_debug)
1223 print_savedreg_msg (rn, register_offsets, true);
1224 continue;
1225 }
1226 break;
1227 }
1228 else
1229 {
1230 /* INSN_LEN == 4. */
1231 int stw_regnum = (insn2 >> 21) & 0x1f;
1232 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
1233 {
1234 int offset;
1235
1236 /* CSKY_FPC_REGNUM. */
1237 rn = CSKY_NUM_GREGS + 3;
1238 offset = CSKY_32_ST_OFFSET (insn2);
1239 register_offsets[rn] = framesize - offset;
1240 if (csky_debug)
1241 print_savedreg_msg (rn, register_offsets, true);
1242 continue;
1243 }
1244 break;
1245 }
1246 }
1247 else if (CSKY_32_IS_PUSH (insn))
1248 {
1249 /* Push for 32_bit. */
1250 if (CSKY_32_IS_PUSH_R29 (insn))
1251 {
1252 stacksize += 4;
1253 register_offsets[29] = stacksize;
1254 if (csky_debug)
1255 print_savedreg_msg (29, register_offsets, false);
1256 }
1257 if (CSKY_32_PUSH_LIST2 (insn))
1258 {
1259 int num = CSKY_32_PUSH_LIST2 (insn);
1260 int tmp = 0;
1261 stacksize += num * 4;
1262 if (csky_debug)
1263 {
1265 "csky: push regs_array: r16-r%d\n",
1266 16 + num - 1);
1267 }
1268 for (rn = 16; rn <= 16 + num - 1; rn++)
1269 {
1270 register_offsets[rn] = stacksize - tmp;
1271 if (csky_debug)
1272 {
1274 "csky: r%d saved at 0x%x"
1275 " (offset %d)\n", rn,
1276 register_offsets[rn], tmp);
1277 }
1278 tmp += 4;
1279 }
1280 }
1281 if (CSKY_32_IS_PUSH_R15 (insn))
1282 {
1283 stacksize += 4;
1284 register_offsets[15] = stacksize;
1285 if (csky_debug)
1286 print_savedreg_msg (15, register_offsets, false);
1287 }
1288 if (CSKY_32_PUSH_LIST1 (insn))
1289 {
1290 int num = CSKY_32_PUSH_LIST1 (insn);
1291 int tmp = 0;
1292 stacksize += num * 4;
1293 if (csky_debug)
1294 {
1296 "csky: push regs_array: r4-r%d\n",
1297 4 + num - 1);
1298 }
1299 for (rn = 4; rn <= 4 + num - 1; rn++)
1300 {
1301 register_offsets[rn] = stacksize - tmp;
1302 if (csky_debug)
1303 {
1305 "csky: r%d saved at 0x%x"
1306 " (offset %d)\n", rn,
1307 register_offsets[rn], tmp);
1308 }
1309 tmp += 4;
1310 }
1311 }
1312
1313 framesize = stacksize;
1314 if (csky_debug)
1315 gdb_printf (gdb_stdlog, "csky: continuing\n");
1316 continue;
1317 }
1318 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
1319 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
1320 {
1321 int adjust = 0;
1322 int offset = 0;
1323 unsigned int insn2;
1324
1325 if (csky_debug)
1326 {
1328 "csky: looking at large frame\n");
1329 }
1330 if (CSKY_32_IS_LRW4 (insn))
1331 {
1332 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1333 int literal_addr = (addr + ((insn & 0xffff) << 2))
1334 & 0xfffffffc;
1335 adjust = read_memory_unsigned_integer (literal_addr, 4,
1336 byte_order);
1337 }
1338 else if (CSKY_32_IS_MOVI4 (insn))
1339 adjust = (insn & 0xffff);
1340 else if (CSKY_32_IS_MOVIH4 (insn))
1341 adjust = (insn & 0xffff) << 16;
1342 else
1343 {
1344 /* CSKY_32_IS_BMASKI4 (insn). */
1345 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
1346 }
1347
1348 if (csky_debug)
1349 {
1351 "csky: base stacksize=0x%x\n", adjust);
1352
1353 /* May have zero or more insns which modify r4. */
1355 "csky: looking for r4 adjusters...\n");
1356 }
1357
1358 offset = 4;
1359 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1360 while (CSKY_IS_R4_ADJUSTER (insn2))
1361 {
1362 if (CSKY_32_IS_ADDI4 (insn2))
1363 {
1364 int imm = (insn2 & 0xfff) + 1;
1365 adjust += imm;
1366 if (csky_debug)
1367 {
1369 "csky: addi r4,%d\n", imm);
1370 }
1371 }
1372 else if (CSKY_32_IS_SUBI4 (insn2))
1373 {
1374 int imm = (insn2 & 0xfff) + 1;
1375 adjust -= imm;
1376 if (csky_debug)
1377 {
1379 "csky: subi r4,%d\n", imm);
1380 }
1381 }
1382 else if (CSKY_32_IS_NOR4 (insn2))
1383 {
1384 adjust = ~adjust;
1385 if (csky_debug)
1386 {
1388 "csky: nor r4,r4,r4\n");
1389 }
1390 }
1391 else if (CSKY_32_IS_ROTLI4 (insn2))
1392 {
1393 int imm = ((insn2 >> 21) & 0x1f);
1394 int temp = adjust >> (32 - imm);
1395 adjust <<= imm;
1396 adjust |= temp;
1397 if (csky_debug)
1398 {
1400 "csky: rotli r4,r4,%d\n", imm);
1401 }
1402 }
1403 else if (CSKY_32_IS_LISI4 (insn2))
1404 {
1405 int imm = ((insn2 >> 21) & 0x1f);
1406 adjust <<= imm;
1407 if (csky_debug)
1408 {
1410 "csky: lsli r4,r4,%d\n", imm);
1411 }
1412 }
1413 else if (CSKY_32_IS_BSETI4 (insn2))
1414 {
1415 int imm = ((insn2 >> 21) & 0x1f);
1416 adjust |= (1 << imm);
1417 if (csky_debug)
1418 {
1420 "csky: bseti r4,r4 %d\n", imm);
1421 }
1422 }
1423 else if (CSKY_32_IS_BCLRI4 (insn2))
1424 {
1425 int imm = ((insn2 >> 21) & 0x1f);
1426 adjust &= ~(1 << imm);
1427 if (csky_debug)
1428 {
1430 "csky: bclri r4,r4 %d\n", imm);
1431 }
1432 }
1433 else if (CSKY_32_IS_IXH4 (insn2))
1434 {
1435 adjust *= 3;
1436 if (csky_debug)
1437 {
1439 "csky: ixh r4,r4,r4\n");
1440 }
1441 }
1442 else if (CSKY_32_IS_IXW4 (insn2))
1443 {
1444 adjust *= 5;
1445 if (csky_debug)
1446 {
1448 "csky: ixw r4,r4,r4\n");
1449 }
1450 }
1451 else if (CSKY_16_IS_ADDI4 (insn2))
1452 {
1453 int imm = (insn2 & 0xff) + 1;
1454 adjust += imm;
1455 if (csky_debug)
1456 {
1458 "csky: addi r4,%d\n", imm);
1459 }
1460 }
1461 else if (CSKY_16_IS_SUBI4 (insn2))
1462 {
1463 int imm = (insn2 & 0xff) + 1;
1464 adjust -= imm;
1465 if (csky_debug)
1466 {
1468 "csky: subi r4,%d\n", imm);
1469 }
1470 }
1471 else if (CSKY_16_IS_NOR4 (insn2))
1472 {
1473 adjust = ~adjust;
1474 if (csky_debug)
1475 {
1477 "csky: nor r4,r4\n");
1478 }
1479 }
1480 else if (CSKY_16_IS_BSETI4 (insn2))
1481 {
1482 int imm = (insn2 & 0x1f);
1483 adjust |= (1 << imm);
1484 if (csky_debug)
1485 {
1487 "csky: bseti r4, %d\n", imm);
1488 }
1489 }
1490 else if (CSKY_16_IS_BCLRI4 (insn2))
1491 {
1492 int imm = (insn2 & 0x1f);
1493 adjust &= ~(1 << imm);
1494 if (csky_debug)
1495 {
1497 "csky: bclri r4, %d\n", imm);
1498 }
1499 }
1500 else if (CSKY_16_IS_LSLI4 (insn2))
1501 {
1502 int imm = (insn2 & 0x1f);
1503 adjust <<= imm;
1504 if (csky_debug)
1505 {
1507 "csky: lsli r4,r4, %d\n", imm);
1508 }
1509 }
1510
1511 offset += insn_len;
1512 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1513 };
1514
1515 if (csky_debug)
1516 {
1517 gdb_printf (gdb_stdlog, "csky: done looking for"
1518 " r4 adjusters\n");
1519 }
1520
1521 /* If the next insn adjusts the stack pointer, we keep
1522 everything; if not, we scrap it and we've found the
1523 end of the prologue. */
1524 if (CSKY_IS_SUBU4 (insn2))
1525 {
1526 addr += offset;
1527 stacksize += adjust;
1528 if (csky_debug)
1529 {
1531 "csky: found stack adjustment of"
1532 " 0x%x bytes.\n", adjust);
1534 "csky: skipping to new address %s\n",
1535 core_addr_to_string_nz (addr));
1537 "csky: continuing\n");
1538 }
1539 continue;
1540 }
1541
1542 /* None of these instructions are prologue, so don't touch
1543 anything. */
1544 if (csky_debug)
1545 {
1547 "csky: no subu sp,sp,r4; NOT altering"
1548 " stacksize.\n");
1549 }
1550 break;
1551 }
1552 }
1553 else
1554 {
1555 /* insn_len != 4. */
1556
1557 /* subi.sp sp,disp. */
1558 if (CSKY_16_IS_SUBI0 (insn))
1559 {
1560 int offset = CSKY_16_SUBI_IMM (insn);
1561 if (csky_debug)
1562 {
1564 "csky: got subi r0,%d; continuing\n",
1565 offset);
1566 }
1567 stacksize += offset;
1568 continue;
1569 }
1570 /* stw.16 rz,(sp,disp). */
1571 else if (CSKY_16_IS_STWx0 (insn))
1572 {
1573 /* Spill register: see note for IS_STM above. */
1574 int disp;
1575
1576 rn = CSKY_16_ST_VAL_REGNUM (insn);
1577 disp = CSKY_16_ST_OFFSET (insn);
1578 register_offsets[rn] = stacksize - disp;
1579 if (csky_debug)
1580 print_savedreg_msg (rn, register_offsets, true);
1581 continue;
1582 }
1583 else if (CSKY_16_IS_MOV_FP_SP (insn))
1584 {
1585 /* SP is saved to FP reg, means prologue may modify SP. */
1586 is_fp_saved = 1;
1587 adjust_fp = stacksize;
1588 continue;
1589 }
1590 else if (CSKY_16_IS_PUSH (insn))
1591 {
1592 /* Push for 16_bit. */
1593 int offset = 0;
1594 if (CSKY_16_IS_PUSH_R15 (insn))
1595 {
1596 stacksize += 4;
1597 register_offsets[15] = stacksize;
1598 if (csky_debug)
1599 print_savedreg_msg (15, register_offsets, false);
1600 offset += 4;
1601 }
1602 if (CSKY_16_PUSH_LIST1 (insn))
1603 {
1604 int num = CSKY_16_PUSH_LIST1 (insn);
1605 int tmp = 0;
1606 stacksize += num * 4;
1607 offset += num * 4;
1608 if (csky_debug)
1609 {
1611 "csky: push regs_array: r4-r%d\n",
1612 4 + num - 1);
1613 }
1614 for (rn = 4; rn <= 4 + num - 1; rn++)
1615 {
1616 register_offsets[rn] = stacksize - tmp;
1617 if (csky_debug)
1618 {
1620 "csky: r%d saved at 0x%x"
1621 " (offset %d)\n", rn,
1622 register_offsets[rn], offset);
1623 }
1624 tmp += 4;
1625 }
1626 }
1627
1628 framesize = stacksize;
1629 if (csky_debug)
1630 gdb_printf (gdb_stdlog, "csky: continuing\n");
1631 continue;
1632 }
1633 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1634 {
1635 int adjust = 0;
1636 unsigned int insn2;
1637
1638 if (csky_debug)
1639 {
1641 "csky: looking at large frame\n");
1642 }
1643 if (CSKY_16_IS_LRW4 (insn))
1644 {
1645 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1646 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1647 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1648 adjust = read_memory_unsigned_integer (literal_addr, 4,
1649 byte_order);
1650 }
1651 else
1652 {
1653 /* CSKY_16_IS_MOVI4 (insn). */
1654 adjust = (insn & 0xff);
1655 }
1656
1657 if (csky_debug)
1658 {
1660 "csky: base stacksize=0x%x\n", adjust);
1661 }
1662
1663 /* May have zero or more instructions which modify r4. */
1664 if (csky_debug)
1665 {
1667 "csky: looking for r4 adjusters...\n");
1668 }
1669 int offset = 2;
1670 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1671 while (CSKY_IS_R4_ADJUSTER (insn2))
1672 {
1673 if (CSKY_32_IS_ADDI4 (insn2))
1674 {
1675 int imm = (insn2 & 0xfff) + 1;
1676 adjust += imm;
1677 if (csky_debug)
1678 {
1680 "csky: addi r4,%d\n", imm);
1681 }
1682 }
1683 else if (CSKY_32_IS_SUBI4 (insn2))
1684 {
1685 int imm = (insn2 & 0xfff) + 1;
1686 adjust -= imm;
1687 if (csky_debug)
1688 {
1690 "csky: subi r4,%d\n", imm);
1691 }
1692 }
1693 else if (CSKY_32_IS_NOR4 (insn2))
1694 {
1695 adjust = ~adjust;
1696 if (csky_debug)
1697 {
1699 "csky: nor r4,r4,r4\n");
1700 }
1701 }
1702 else if (CSKY_32_IS_ROTLI4 (insn2))
1703 {
1704 int imm = ((insn2 >> 21) & 0x1f);
1705 int temp = adjust >> (32 - imm);
1706 adjust <<= imm;
1707 adjust |= temp;
1708 if (csky_debug)
1709 {
1711 "csky: rotli r4,r4,%d\n", imm);
1712 }
1713 }
1714 else if (CSKY_32_IS_LISI4 (insn2))
1715 {
1716 int imm = ((insn2 >> 21) & 0x1f);
1717 adjust <<= imm;
1718 if (csky_debug)
1719 {
1721 "csky: lsli r4,r4,%d\n", imm);
1722 }
1723 }
1724 else if (CSKY_32_IS_BSETI4 (insn2))
1725 {
1726 int imm = ((insn2 >> 21) & 0x1f);
1727 adjust |= (1 << imm);
1728 if (csky_debug)
1729 {
1731 "csky: bseti r4,r4 %d\n", imm);
1732 }
1733 }
1734 else if (CSKY_32_IS_BCLRI4 (insn2))
1735 {
1736 int imm = ((insn2 >> 21) & 0x1f);
1737 adjust &= ~(1 << imm);
1738 if (csky_debug)
1739 {
1741 "csky: bclri r4,r4 %d\n", imm);
1742 }
1743 }
1744 else if (CSKY_32_IS_IXH4 (insn2))
1745 {
1746 adjust *= 3;
1747 if (csky_debug)
1748 {
1750 "csky: ixh r4,r4,r4\n");
1751 }
1752 }
1753 else if (CSKY_32_IS_IXW4 (insn2))
1754 {
1755 adjust *= 5;
1756 if (csky_debug)
1757 {
1759 "csky: ixw r4,r4,r4\n");
1760 }
1761 }
1762 else if (CSKY_16_IS_ADDI4 (insn2))
1763 {
1764 int imm = (insn2 & 0xff) + 1;
1765 adjust += imm;
1766 if (csky_debug)
1767 {
1769 "csky: addi r4,%d\n", imm);
1770 }
1771 }
1772 else if (CSKY_16_IS_SUBI4 (insn2))
1773 {
1774 int imm = (insn2 & 0xff) + 1;
1775 adjust -= imm;
1776 if (csky_debug)
1777 {
1779 "csky: subi r4,%d\n", imm);
1780 }
1781 }
1782 else if (CSKY_16_IS_NOR4 (insn2))
1783 {
1784 adjust = ~adjust;
1785 if (csky_debug)
1786 {
1788 "csky: nor r4,r4\n");
1789 }
1790 }
1791 else if (CSKY_16_IS_BSETI4 (insn2))
1792 {
1793 int imm = (insn2 & 0x1f);
1794 adjust |= (1 << imm);
1795 if (csky_debug)
1796 {
1798 "csky: bseti r4, %d\n", imm);
1799 }
1800 }
1801 else if (CSKY_16_IS_BCLRI4 (insn2))
1802 {
1803 int imm = (insn2 & 0x1f);
1804 adjust &= ~(1 << imm);
1805 if (csky_debug)
1806 {
1808 "csky: bclri r4, %d\n", imm);
1809 }
1810 }
1811 else if (CSKY_16_IS_LSLI4 (insn2))
1812 {
1813 int imm = (insn2 & 0x1f);
1814 adjust <<= imm;
1815 if (csky_debug)
1816 {
1818 "csky: lsli r4,r4, %d\n", imm);
1819 }
1820 }
1821
1822 offset += insn_len;
1823 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1824 };
1825
1826 if (csky_debug)
1827 {
1828 gdb_printf (gdb_stdlog, "csky: "
1829 "done looking for r4 adjusters\n");
1830 }
1831
1832 /* If the next instruction adjusts the stack pointer, we keep
1833 everything; if not, we scrap it and we've found the end
1834 of the prologue. */
1835 if (CSKY_IS_SUBU4 (insn2))
1836 {
1837 addr += offset;
1838 stacksize += adjust;
1839 if (csky_debug)
1840 {
1841 gdb_printf (gdb_stdlog, "csky: "
1842 "found stack adjustment of 0x%x"
1843 " bytes.\n", adjust);
1844 gdb_printf (gdb_stdlog, "csky: "
1845 "skipping to new address %s\n",
1846 core_addr_to_string_nz (addr));
1847 gdb_printf (gdb_stdlog, "csky: continuing\n");
1848 }
1849 continue;
1850 }
1851
1852 /* None of these instructions are prologue, so don't touch
1853 anything. */
1854 if (csky_debug)
1855 {
1856 gdb_printf (gdb_stdlog, "csky: no subu sp,r4; "
1857 "NOT altering stacksize.\n");
1858 }
1859 break;
1860 }
1861 }
1862
1863 /* This is not a prologue instruction, so stop here. */
1864 if (csky_debug)
1865 {
1866 gdb_printf (gdb_stdlog, "csky: insn is not a prologue"
1867 " insn -- ending scan\n");
1868 }
1869 break;
1870 }
1871
1872 if (this_cache)
1873 {
1874 CORE_ADDR unwound_fp;
1875 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1876 this_cache->framesize = framesize;
1877
1878 if (is_fp_saved)
1879 {
1880 this_cache->framereg = CSKY_FP_REGNUM;
1881 unwound_fp = get_frame_register_unsigned (this_frame,
1882 this_cache->framereg);
1883 this_cache->prev_sp = unwound_fp + adjust_fp;
1884 }
1885 else
1886 {
1887 this_cache->framereg = CSKY_SP_REGNUM;
1888 unwound_fp = get_frame_register_unsigned (this_frame,
1889 this_cache->framereg);
1890 this_cache->prev_sp = unwound_fp + stacksize;
1891 }
1892
1893 /* Note where saved registers are stored. The offsets in
1894 REGISTER_OFFSETS are computed relative to the top of the frame. */
1895 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1896 {
1897 if (register_offsets[rn] >= 0)
1898 {
1899 this_cache->saved_regs[rn].set_addr (this_cache->prev_sp
1900 - register_offsets[rn]);
1901 if (csky_debug)
1902 {
1903 CORE_ADDR rn_value = read_memory_unsigned_integer (
1904 this_cache->saved_regs[rn].addr (), 4, byte_order);
1905 gdb_printf (gdb_stdlog, "Saved register %s "
1906 "stored at 0x%08lx, value=0x%08lx\n",
1908 (unsigned long)
1909 this_cache->saved_regs[rn].addr (),
1910 (unsigned long) rn_value);
1911 }
1912 }
1913 }
1914 if (lr_type == LR_TYPE_EPC)
1915 {
1916 /* rte || epc . */
1917 this_cache->saved_regs[CSKY_PC_REGNUM]
1918 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1919 }
1920 else if (lr_type == LR_TYPE_FPC)
1921 {
1922 /* rfi || fpc . */
1923 this_cache->saved_regs[CSKY_PC_REGNUM]
1924 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1925 }
1926 else
1927 {
1928 this_cache->saved_regs[CSKY_PC_REGNUM]
1929 = this_cache->saved_regs[CSKY_LR_REGNUM];
1930 }
1931 }
1932
1933 return addr;
1934}
1935
1936/* Detect whether PC is at a point where the stack frame has been
1937 destroyed. */
1938
1939static int
1941{
1942 unsigned int insn;
1943 CORE_ADDR addr;
1944 CORE_ADDR func_start, func_end;
1945
1946 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1947 return 0;
1948
1949 bool fp_saved = false;
1950 int insn_len;
1951 for (addr = func_start; addr < func_end; addr += insn_len)
1952 {
1953 /* Get next insn. */
1954 insn_len = csky_get_insn (gdbarch, addr, &insn);
1955
1956 if (insn_len == 2)
1957 {
1958 /* Is sp is saved to fp. */
1959 if (CSKY_16_IS_MOV_FP_SP (insn))
1960 fp_saved = true;
1961 /* If sp was saved to fp and now being restored from
1962 fp then it indicates the start of epilog. */
1963 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1964 return pc >= addr;
1965 }
1966 }
1967 return 0;
1968}
1969
1970/* Implement the skip_prologue gdbarch hook. */
1971
1972static CORE_ADDR
1973csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1974{
1975 CORE_ADDR func_addr, func_end;
1976 const int default_search_limit = 128;
1977
1978 /* See if we can find the end of the prologue using the symbol table. */
1979 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1980 {
1981 CORE_ADDR post_prologue_pc
1982 = skip_prologue_using_sal (gdbarch, func_addr);
1983
1984 if (post_prologue_pc != 0)
1985 return std::max (pc, post_prologue_pc);
1986 }
1987 else
1988 func_end = pc + default_search_limit;
1989
1990 /* Find the end of prologue. Default lr_type. */
1991 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1992 NULL, NULL, LR_TYPE_R15);
1993}
1994
1995/* Implement the breakpoint_kind_from_pc gdbarch method. */
1996
1997static int
1999{
2000 if (csky_pc_is_csky16 (gdbarch, *pcptr))
2001 return CSKY_INSN_SIZE16;
2002 else
2003 return CSKY_INSN_SIZE32;
2004}
2005
2006/* Implement the sw_breakpoint_from_kind gdbarch method. */
2007
2008static const gdb_byte *
2010{
2011 *size = kind;
2012 if (kind == CSKY_INSN_SIZE16)
2013 {
2014 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
2015 return csky_16_breakpoint;
2016 }
2017 else
2018 {
2019 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
2020 return csky_32_breakpoint;
2021 }
2022}
2023
2024/* Determine link register type. */
2025
2026static lr_type_t
2028 CORE_ADDR start_pc, CORE_ADDR end_pc)
2029{
2030 CORE_ADDR addr;
2031 unsigned int insn, insn_len;
2032 insn_len = 2;
2033
2034 for (addr = start_pc; addr < end_pc; addr += insn_len)
2035 {
2036 insn_len = csky_get_insn (gdbarch, addr, &insn);
2037 if (insn_len == 4)
2038 {
2039 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
2040 || CSKY_32_IS_RTE (insn))
2041 return LR_TYPE_EPC;
2042 }
2043 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
2044 || CSKY_32_IS_RFI (insn))
2045 return LR_TYPE_FPC;
2046 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
2047 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
2048 return LR_TYPE_R15;
2049 else
2050 {
2051 /* 16 bit instruction. */
2052 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
2053 || CSKY_16_IS_JMPIX (insn))
2054 return LR_TYPE_R15;
2055 }
2056 }
2057 return LR_TYPE_R15;
2058}
2059
2060/* Heuristic unwinder. */
2061
2062static struct csky_unwind_cache *
2064{
2065 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
2066 struct csky_unwind_cache *cache;
2067 const struct block *bl;
2068 unsigned long func_size = 0;
2069 struct gdbarch *gdbarch = get_frame_arch (this_frame);
2070 unsigned int sp_regnum = CSKY_SP_REGNUM;
2071
2072 /* Default lr type is r15. */
2073 lr_type_t lr_type = LR_TYPE_R15;
2074
2075 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
2076 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2077
2078 /* Assume there is no frame until proven otherwise. */
2079 cache->framereg = sp_regnum;
2080
2081 cache->framesize = 0;
2082
2083 prev_pc = get_frame_pc (this_frame);
2084 block_addr = get_frame_address_in_block (this_frame);
2085 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
2086 &func_end) == 0)
2087 /* We couldn't find a function containing block_addr, so bail out
2088 and hope for the best. */
2089 return cache;
2090
2091 /* Get the (function) symbol matching prologue_start. */
2092 bl = block_for_pc (prologue_start);
2093 if (bl != NULL)
2094 func_size = bl->end () - bl->start ();
2095 else
2096 {
2097 struct bound_minimal_symbol msymbol
2098 = lookup_minimal_symbol_by_pc (prologue_start);
2099 if (msymbol.minsym != NULL)
2100 func_size = msymbol.minsym->size ();
2101 }
2102
2103 /* If FUNC_SIZE is 0 we may have a special-case use of lr
2104 e.g. exception or interrupt. */
2105 if (func_size == 0)
2106 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
2107
2108 prologue_end = std::min (func_end, prev_pc);
2109
2110 /* Analyze the function prologue. */
2111 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
2112 func_end, this_frame, cache, lr_type);
2113
2114 /* gdbarch_sp_regnum contains the value and not the address. */
2115 cache->saved_regs[sp_regnum].set_value (cache->prev_sp);
2116 return cache;
2117}
2118
2119/* Implement the this_id function for the normal unwinder. */
2120
2121static void
2123 void **this_prologue_cache, struct frame_id *this_id)
2124{
2125 struct csky_unwind_cache *cache;
2126 struct frame_id id;
2127
2128 if (*this_prologue_cache == NULL)
2129 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
2130 cache = (struct csky_unwind_cache *) *this_prologue_cache;
2131
2132 /* This marks the outermost frame. */
2133 if (cache->prev_sp == 0)
2134 return;
2135
2136 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
2137 *this_id = id;
2138}
2139
2140/* Implement the prev_register function for the normal unwinder. */
2141
2142static struct value *
2144 void **this_prologue_cache, int regnum)
2145{
2146 struct csky_unwind_cache *cache;
2147
2148 if (*this_prologue_cache == NULL)
2149 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
2150 cache = (struct csky_unwind_cache *) *this_prologue_cache;
2151
2152 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
2153 regnum);
2154}
2155
2156/* Data structures for the normal prologue-analysis-based
2157 unwinder. */
2158
2159static const struct frame_unwind csky_unwind_cache = {
2160 "cski prologue",
2165 NULL,
2167 NULL,
2168 NULL
2169};
2170
2171static CORE_ADDR
2173{
2174 gdb_byte buf[8];
2175 struct gdbarch *gdbarch = get_frame_arch (frame);
2176 enum bfd_endian byte_order_for_code
2178
2179 if (target_read_memory (pc, buf, 8) == 0)
2180 {
2181 unsigned int data0
2182 = extract_unsigned_integer (buf, 4, byte_order_for_code);
2183 unsigned int data1
2184 = extract_unsigned_integer (buf + 4, 4, byte_order_for_code);
2185
2186 /* Case: jmpi [pc+4] : 0xeac00001
2187 .long addr */
2188 if (data0 == CSKY_JMPI_PC_4)
2189 return data1;
2190
2191 /* Case: lrw t1, [pc+8] : 0xea8d0002
2192 jmp t1 : 0x7834
2193 nop : 0x6c03
2194 .long addr */
2195 if ((data0 == CSKY_LRW_T1_PC_8) && (data1 == CSKY_JMP_T1_VS_NOP))
2196 {
2197 if (target_read_memory (pc + 8, buf, 4) == 0)
2198 return extract_unsigned_integer (buf, 4, byte_order_for_code);
2199 }
2200
2201 return 0;
2202 }
2203
2204 return 0;
2205}
2206
2207static int
2209 frame_info_ptr this_frame,
2210 void **this_prologue_cache)
2211{
2212 CORE_ADDR addr_in_block, pc;
2213 gdb_byte dummy[4];
2214 const char *name;
2215 CORE_ADDR start_addr;
2216
2217 /* Get pc */
2218 addr_in_block = get_frame_address_in_block (this_frame);
2219 pc = get_frame_pc (this_frame);
2220
2221 if (in_plt_section (addr_in_block)
2222 || target_read_memory (pc, dummy, 4) != 0)
2223 return 1;
2224
2225 /* Find the starting address and name of the function containing the PC. */
2226 if (find_pc_partial_function (pc, &name, &start_addr, NULL) == 0)
2227 {
2228 start_addr = csky_check_long_branch (this_frame, pc);
2229 /* if not long branch, return 0. */
2230 if (start_addr != 0)
2231 return 1;
2232
2233 return 0;
2234 }
2235
2236 return 0;
2237}
2238
2239static struct csky_unwind_cache *
2241{
2242 struct csky_unwind_cache *cache;
2243
2244 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
2245 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
2246 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
2247
2248 return cache;
2249}
2250
2251static void
2253 void **this_cache,
2254 struct frame_id *this_id)
2255{
2256 struct csky_unwind_cache *cache;
2257
2258 if (*this_cache == NULL)
2259 *this_cache = csky_make_stub_cache (this_frame);
2260 cache = (struct csky_unwind_cache *) *this_cache;
2261
2262 /* Our frame ID for a stub frame is the current SP and LR. */
2263 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
2264}
2265
2266static struct value *
2268 void **this_cache,
2269 int prev_regnum)
2270{
2271 struct csky_unwind_cache *cache;
2272
2273 if (*this_cache == NULL)
2274 *this_cache = csky_make_stub_cache (this_frame);
2275 cache = (struct csky_unwind_cache *) *this_cache;
2276
2277 /* If we are asked to unwind the PC, then return the LR. */
2278 if (prev_regnum == CSKY_PC_REGNUM)
2279 {
2280 CORE_ADDR lr;
2281
2283 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
2284 }
2285
2286 if (prev_regnum == CSKY_SP_REGNUM)
2287 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
2288
2289 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
2290 prev_regnum);
2291}
2292
2294 "csky stub",
2299 NULL,
2301};
2302
2303/* Implement the this_base, this_locals, and this_args hooks
2304 for the normal unwinder. */
2305
2306static CORE_ADDR
2307csky_frame_base_address (frame_info_ptr this_frame, void **this_cache)
2308{
2309 struct csky_unwind_cache *cache;
2310
2311 if (*this_cache == NULL)
2312 *this_cache = csky_frame_unwind_cache (this_frame);
2313 cache = (struct csky_unwind_cache *) *this_cache;
2314
2315 return cache->prev_sp - cache->framesize;
2316}
2317
2318static const struct frame_base csky_frame_base = {
2323};
2324
2325/* Initialize register access method. */
2326
2327static void
2329 struct dwarf2_frame_state_reg *reg,
2330 frame_info_ptr this_frame)
2331{
2333 reg->how = DWARF2_FRAME_REG_RA;
2334 else if (regnum == gdbarch_sp_regnum (gdbarch))
2336}
2337
2338/* Create csky register groups. */
2339
2340static void
2342{
2347 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2348}
2349
2350/* Add register groups into reggroup list. */
2351
2352static void
2354{
2360}
2361
2362/* Return the groups that a CSKY register can be categorised into. */
2363
2364static int
2366 const struct reggroup *reggroup)
2367{
2368 int raw_p;
2369
2370 if (gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2371 return 0;
2372
2373 if (reggroup == all_reggroup)
2374 return 1;
2375
2376 raw_p = regnum < gdbarch_num_regs (gdbarch);
2378 return raw_p;
2379
2380 if ((((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2381 || (regnum == CSKY_PC_REGNUM)
2382 || (regnum == CSKY_EPC_REGNUM)
2383 || (regnum == CSKY_CR0_REGNUM)
2384 || (regnum == CSKY_EPSR_REGNUM))
2385 && (reggroup == general_reggroup))
2386 return 1;
2387
2388 if (((regnum == CSKY_PC_REGNUM)
2389 || ((regnum >= CSKY_CR0_REGNUM)
2390 && (regnum <= CSKY_CR0_REGNUM + 30)))
2391 && (reggroup == cr_reggroup))
2392 return 2;
2393
2394 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2395 || ((regnum >= CSKY_FCR_REGNUM)
2396 && (regnum <= CSKY_FCR_REGNUM + 2)))
2397 && (reggroup == vr_reggroup))
2398 return 3;
2399
2400 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2401 && (reggroup == mmu_reggroup))
2402 return 4;
2403
2404 if (((regnum >= CSKY_PROFCR_REGNUM)
2405 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2406 && (reggroup == prof_reggroup))
2407 return 5;
2408
2409 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2410 || ((regnum >= CSKY_FCR_REGNUM) && (regnum <= CSKY_FCR_REGNUM + 2)))
2411 && (reggroup == fr_reggroup))
2412 return 6;
2413
2415 {
2417 return 7;
2418 }
2419
2420 return 0;
2421}
2422
2423/* Implement the dwarf2_reg_to_regnum gdbarch method. */
2424
2425static int
2427{
2428 /* For GPRs. */
2429 if (dw_reg >= CSKY_R0_REGNUM && dw_reg <= CSKY_R0_REGNUM + 31)
2430 return dw_reg;
2431
2432 /* For Hi, Lo, PC. */
2433 if (dw_reg == CSKY_HI_REGNUM || dw_reg == CSKY_LO_REGNUM
2434 || dw_reg == CSKY_PC_REGNUM)
2435 return dw_reg;
2436
2437 /* For Float and Vector pseudo registers. */
2438 if (dw_reg >= FV_PSEUDO_REGNO_FIRST && dw_reg <= FV_PSEUDO_REGNO_LAST)
2439 {
2440 char name_buf[4];
2441
2442 xsnprintf (name_buf, sizeof (name_buf), "s%d",
2443 dw_reg - FV_PSEUDO_REGNO_FIRST);
2444 return user_reg_map_name_to_regnum (gdbarch, name_buf,
2445 strlen (name_buf));
2446 }
2447
2448 /* Others, unknown. */
2449 return -1;
2450}
2451
2452/* Check whether xml has discribled the essential regs. */
2453
2454static int
2456{
2457 if ((strcmp (reg->name , "pc") == 0)
2458 && (reg->num == CSKY_PC_REGNUM))
2460 else if ((strcmp (reg->name , "r14") == 0)
2461 && (reg->num == CSKY_SP_REGNUM))
2463 else if ((strcmp (reg->name , "r15") == 0)
2464 && (reg->num == CSKY_LR_REGNUM))
2466 else
2467 return 0;
2468}
2469
2470/* Check whether xml has discribled the fr0~fr15 regs. */
2471
2472static int
2474 int i = 0;
2475 for (i = 0; i < 16; i++)
2476 {
2477 if ((strcmp (reg->name, csky_supported_fpu_regs[i].name) == 0)
2478 && (csky_supported_fpu_regs[i].num == reg->num))
2479 return (1 << i);
2480 }
2481
2482 return 0;
2483};
2484
2485/* Check whether xml has discribled the fr16~fr31 regs. */
2486
2487static int
2489 int i = 0;
2490 for (i = 0; i < 16; i++)
2491 {
2492 if ((strcmp (reg->name, csky_supported_fpu_regs[i + 16].name) == 0)
2493 && (csky_supported_fpu_regs[i + 16].num == reg->num))
2494 return (1 << i);
2495 }
2496
2497 return 0;
2498};
2499
2500/* Check whether xml has discribled the vr0~vr15 regs. */
2501
2502static int
2504 int i = 0;
2505 for (i = 0; i < 16; i++)
2506 {
2507 if ((strcmp (reg->name, csky_supported_fpu_regs[i + 32].name) == 0)
2508 && (csky_supported_fpu_regs[i + 32].num == reg->num))
2509 return (1 << i);
2510 }
2511
2512 return 0;
2513};
2514
2515/* Return pseudo reg's name. */
2516
2517static const char *
2519{
2520 int num_regs = gdbarch_num_regs (gdbarch);
2521 csky_gdbarch_tdep *tdep
2522 = gdbarch_tdep<csky_gdbarch_tdep> (gdbarch);
2523
2524 regno -= num_regs;
2525
2526 if (tdep->fv_pseudo_registers_count)
2527 {
2528 static const char *const fv_pseudo_names[] = {
2529 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2530 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2531 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2532 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2533 "s32", "s33", "s34", "s35", "s36", "s37", "s38", "s39",
2534 "s40", "s41", "s42", "s43", "s44", "s45", "s46", "s47",
2535 "s48", "s49", "s50", "s51", "s52", "s53", "s54", "s55",
2536 "s56", "s57", "s58", "s59", "s60", "s61", "s62", "s63",
2537 "s64", "s65", "s66", "s67", "s68", "s69", "s70", "s71",
2538 "s72", "s73", "s74", "s75", "s76", "s77", "s78", "s79",
2539 "s80", "s81", "s82", "s83", "s84", "s85", "s86", "s87",
2540 "s88", "s89", "s90", "s91", "s92", "s93", "s94", "s95",
2541 "s96", "s97", "s98", "s99", "s100", "s101", "s102", "s103",
2542 "s104", "s105", "s106", "s107", "s108", "s109", "s110", "s111",
2543 "s112", "s113", "s114", "s115", "s116", "s117", "s118", "s119",
2544 "s120", "s121", "s122", "s123", "s124", "s125", "s126", "s127",
2545 };
2546
2547 if (regno < tdep->fv_pseudo_registers_count)
2548 {
2549 if ((regno < 64) && ((regno % 4) >= 2) && !tdep->has_vr0)
2550 return "";
2551 else if ((regno >= 64) && ((regno % 4) >= 2))
2552 return "";
2553 else
2554 return fv_pseudo_names[regno];
2555 }
2556 }
2557
2558 return "";
2559}
2560
2561/* Read for csky pseudo regs. */
2562
2563static enum register_status
2566 int regnum, gdb_byte *buf)
2567{
2568 int num_regs = gdbarch_num_regs (gdbarch);
2569 csky_gdbarch_tdep *tdep
2570 = gdbarch_tdep<csky_gdbarch_tdep> (gdbarch);
2571
2572 regnum -= num_regs;
2573
2574 if (regnum < tdep->fv_pseudo_registers_count)
2575 {
2576 enum register_status status;
2577 int gdb_regnum = 0;
2578 int offset = 0;
2579 gdb_byte reg_buf[16];
2580
2581 /* Ensure getting s0~s63 from vrx if tdep->has_vr0 is ture. */
2582 if (tdep->has_vr0)
2583 {
2584 if (regnum < 64)
2585 {
2587 offset = (regnum % 4) * 4;
2588 }
2589 else
2590 {
2591 gdb_regnum = CSKY_FR16_REGNUM + ((regnum - 64) / 4);
2592 if ((regnum % 4) >= 2)
2593 return REG_UNAVAILABLE;
2594 offset = (regnum % 2) * 4;
2595 }
2596 }
2597 else
2598 {
2600 if ((regnum % 4) >= 2)
2601 return REG_UNAVAILABLE;
2602 offset = (regnum % 2) * 4;
2603 }
2604
2605 status = regcache->raw_read (gdb_regnum, reg_buf);
2606 if (status == REG_VALID)
2607 memcpy (buf, reg_buf + offset, 4);
2608 return status;
2609 }
2610
2611 return REG_UNKNOWN;
2612}
2613
2614/* Write for csky pseudo regs. */
2615
2616static void
2618 int regnum, const gdb_byte *buf)
2619{
2620 int num_regs = gdbarch_num_regs (gdbarch);
2621 csky_gdbarch_tdep *tdep
2622 = gdbarch_tdep<csky_gdbarch_tdep> (gdbarch);
2623
2624 regnum -= num_regs;
2625
2626 if (regnum < tdep->fv_pseudo_registers_count)
2627 {
2628 gdb_byte reg_buf[16];
2629 int gdb_regnum = 0;
2630 int offset = 0;
2631
2632 if (tdep->has_vr0)
2633 {
2634 if (regnum < 64)
2635 {
2637 offset = (regnum % 4) * 4;
2638 }
2639 else
2640 {
2641 gdb_regnum = CSKY_FR16_REGNUM + ((regnum - 64) / 4);
2642 if ((regnum % 4) >= 2)
2643 return;
2644 offset = (regnum % 2) * 4;
2645 }
2646 }
2647 else
2648 {
2650 if ((regnum % 4) >= 2)
2651 return;
2652 offset = (regnum % 2) * 4;
2653 }
2654
2655 regcache->raw_read (gdb_regnum, reg_buf);
2656 memcpy (reg_buf + offset, buf, 4);
2657 regcache->raw_write (gdb_regnum, reg_buf);
2658 return;
2659 }
2660
2661 return;
2662}
2663
2664/* Initialize the current architecture based on INFO. If possible,
2665 re-use an architecture from ARCHES, which is a list of
2666 architectures already created during this debugging session.
2667
2668 Called at program startup, when reading a core file, and when
2669 reading a binary file. */
2670
2671static struct gdbarch *
2673{
2674 struct gdbarch *gdbarch;
2675 /* Analyze info.abfd. */
2676 unsigned int fpu_abi = 0;
2677 unsigned int vdsp_version = 0;
2678 unsigned int fpu_hardfp = 0;
2679 /* Analyze info.target_desc */
2680 int num_regs = 0;
2681 int has_fr0 = 0;
2682 int has_fr16 = 0;
2683 int has_vr0 = 0;
2685
2686 if (tdesc_has_registers (info.target_desc))
2687 {
2688 int valid_p = 0;
2689 int numbered = 0;
2690 int index = 0;
2691 int i = 0;
2692 int feature_names_count = ARRAY_SIZE (csky_supported_tdesc_feature_names);
2693 int support_tdesc_regs_count
2695 const struct csky_supported_tdesc_register *tdesc_reg;
2696 const struct tdesc_feature *feature;
2697
2699 for (index = 0; index < feature_names_count; index ++)
2700 {
2701 feature = tdesc_find_feature (info.target_desc,
2703 if (feature != NULL)
2704 {
2705 for (i = 0; i < support_tdesc_regs_count; i++)
2706 {
2708 if (!tdesc_reg)
2709 break;
2710 numbered = tdesc_numbered_register (feature, tdesc_data.get(),
2711 tdesc_reg->num,
2712 tdesc_reg->name);
2713 if (numbered) {
2714 valid_p |= csky_essential_reg_check (tdesc_reg);
2715 has_fr0 |= csky_fr0_fr15_reg_check (tdesc_reg);
2716 has_fr16 |= csky_fr16_fr31_reg_check (tdesc_reg);
2717 has_vr0 |= csky_vr0_vr15_reg_check (tdesc_reg);
2718 if (num_regs < tdesc_reg->num)
2719 num_regs = tdesc_reg->num;
2720 }
2721 }
2722 }
2723 }
2724 if (valid_p != CSKY_TDESC_REGS_ESSENTIAL_VALUE)
2725 return NULL;
2726 }
2727
2728 /* When the type of bfd file is srec(or any files are not elf),
2729 the E_FLAGS will be not credible. */
2730 if (info.abfd != NULL && bfd_get_flavour (info.abfd) == bfd_target_elf_flavour)
2731 {
2732 /* Get FPU, VDSP build options. */
2733 fpu_abi = bfd_elf_get_obj_attr_int (info.abfd,
2734 OBJ_ATTR_PROC,
2735 Tag_CSKY_FPU_ABI);
2736 vdsp_version = bfd_elf_get_obj_attr_int (info.abfd,
2737 OBJ_ATTR_PROC,
2738 Tag_CSKY_VDSP_VERSION);
2739 fpu_hardfp = bfd_elf_get_obj_attr_int (info.abfd,
2740 OBJ_ATTR_PROC,
2741 Tag_CSKY_FPU_HARDFP);
2742 }
2743
2744 /* Find a candidate among the list of pre-declared architectures. */
2746 arches != NULL;
2747 arches = gdbarch_list_lookup_by_info (arches->next, &info))
2748 {
2749 csky_gdbarch_tdep *tdep
2750 = gdbarch_tdep<csky_gdbarch_tdep> (arches->gdbarch);
2751 if (fpu_abi != tdep->fpu_abi)
2752 continue;
2753 if (vdsp_version != tdep->vdsp_version)
2754 continue;
2755 if (fpu_hardfp != tdep->fpu_hardfp)
2756 continue;
2757
2758 /* Found a match. */
2759 return arches->gdbarch;
2760 }
2761
2762 /* None found, create a new architecture from the information
2763 provided. */
2765 gdbarch = gdbarch_alloc (&info, tdep);
2766 tdep->fpu_abi = fpu_abi;
2767 tdep->vdsp_version = vdsp_version;
2768 tdep->fpu_hardfp = fpu_hardfp;
2769
2770 if (tdesc_data != NULL)
2771 {
2772 if ((has_vr0 == CSKY_FULL16_ONEHOT_VALUE)
2773 && (has_fr16 == CSKY_FULL16_ONEHOT_VALUE))
2774 {
2775 tdep->has_vr0 = 1;
2776 tdep->fv_pseudo_registers_count = 128;
2777 }
2778 else if ((has_vr0 == CSKY_FULL16_ONEHOT_VALUE)
2779 && (has_fr16 != CSKY_FULL16_ONEHOT_VALUE))
2780 {
2781 tdep->has_vr0 = 1;
2782 tdep->fv_pseudo_registers_count = 64;
2783 }
2784 else if ((has_fr0 == CSKY_FULL16_ONEHOT_VALUE)
2785 && (has_vr0 != CSKY_FULL16_ONEHOT_VALUE))
2786 {
2787 tdep->has_vr0 = 0;
2788 tdep->fv_pseudo_registers_count = 64;
2789 }
2790 else
2791 {
2792 tdep->has_vr0 = 0;
2793 tdep->fv_pseudo_registers_count = 0;
2794 }
2795 }
2796 else
2797 {
2798 tdep->has_vr0 = 1;
2799 tdep->fv_pseudo_registers_count = 64;
2800 }
2801
2802 /* Target data types. */
2813
2814 /* Information about the target architecture. */
2818
2819 /* Register architecture. */
2832
2833 /* Functions to analyze frames. */
2839
2840 /* Functions handling dummy frames. */
2842
2843 /* Frame unwinders. Use DWARF debug info if available,
2844 otherwise use our own unwinder. */
2848
2849 /* Hook in ABI-specific overrides, if they have been registered. */
2851
2852 /* Support simple overlay manager. */
2855
2856 if (tdesc_data != nullptr)
2857 {
2858 set_gdbarch_num_regs (gdbarch, (num_regs + 1));
2859 tdesc_use_registers (gdbarch, info.target_desc, std::move (tdesc_data));
2863 }
2864
2865 if (tdep->fv_pseudo_registers_count)
2866 {
2874 }
2875
2876 return gdbarch;
2877}
2878
2879void _initialize_csky_tdep ();
2880void
2882{
2883
2884 gdbarch_register (bfd_arch_csky, csky_gdbarch_init);
2885
2887
2888 /* Allow debugging this file's internals. */
2890 _("Set C-Sky debugging."),
2891 _("Show C-Sky debugging."),
2892 _("When on, C-Sky specific debugging is enabled."),
2893 NULL,
2894 NULL,
2896}
int regnum
Definition: aarch64-tdep.c:68
const char *const name
Definition: aarch64-tdep.c:67
static std::vector< const char * > arches
Definition: arch-utils.c:685
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
Definition: arch-utils.c:1256
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: arch-utils.c:1298
gdb_regnum
Definition: arm.h:39
const struct block * block_for_pc(CORE_ADDR pc)
Definition: block.c:283
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition: blockframe.c:373
enum register_status raw_read(int regnum, gdb_byte *buf)
Definition: regcache.c:605
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition: regcache.c:692
void raw_write(int regnum, const gdb_byte *buf)
Definition: regcache.c:827
void * get(unsigned key)
Definition: registry.h:211
struct cmd_list_element * showdebuglist
Definition: cli-cmds.c:165
struct cmd_list_element * setdebuglist
Definition: cli-cmds.c:163
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:739
@ class_maintenance
Definition: command.h:65
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:346
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
Definition: corefile.c:305
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition: corefile.c:185
static int csky_pc_is_csky16(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: csky-tdep.c:509
static struct csky_unwind_cache * csky_frame_unwind_cache(frame_info_ptr this_frame)
Definition: csky-tdep.c:2063
static const struct frame_base csky_frame_base
Definition: csky-tdep.c:2318
static int csky_vr0_vr15_reg_check(const struct csky_supported_tdesc_register *reg)
Definition: csky-tdep.c:2503
static const struct csky_supported_tdesc_register csky_supported_fpu_regs[]
Definition: csky-tdep.c:158
static CORE_ADDR csky_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: csky-tdep.c:924
static int csky_essential_reg_check(const struct csky_supported_tdesc_register *reg)
Definition: csky-tdep.c:2455
static CORE_ADDR csky_analyze_prologue(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR limit_pc, CORE_ADDR end_pc, frame_info_ptr this_frame, struct csky_unwind_cache *this_cache, lr_type_t lr_type)
Definition: csky-tdep.c:954
static int csky_stub_unwind_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition: csky-tdep.c:2208
static const char *const csky_register_names[]
Definition: csky-tdep.c:590
static int csky_fr16_fr31_reg_check(const struct csky_supported_tdesc_register *reg)
Definition: csky-tdep.c:2488
static const reggroup * mmu_reggroup
Definition: csky-tdep.c:68
static const reggroup * fr_reggroup
Definition: csky-tdep.c:66
static const gdb_byte * csky_sw_breakpoint_from_kind(struct gdbarch *gdbarch, int kind, int *size)
Definition: csky-tdep.c:2009
static frame_unwind csky_stub_unwind
Definition: csky-tdep.c:2293
static void csky_init_reggroup()
Definition: csky-tdep.c:2341
static CORE_ADDR csky_frame_base_address(frame_info_ptr this_frame, void **this_cache)
Definition: csky-tdep.c:2307
static struct type * csky_vector_type(struct gdbarch *gdbarch)
Definition: csky-tdep.c:675
static CORE_ADDR csky_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition: csky-tdep.c:770
static const reggroup * vr_reggroup
Definition: csky-tdep.c:67
static void csky_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int regnum, const gdb_byte *buf)
Definition: csky-tdep.c:2617
static CORE_ADDR csky_check_long_branch(frame_info_ptr frame, CORE_ADDR pc)
Definition: csky-tdep.c:2172
static int csky_get_supported_tdesc_registers_count()
Definition: csky-tdep.c:375
static const reggroup * prof_reggroup
Definition: csky-tdep.c:69
static enum register_status csky_pseudo_register_read(struct gdbarch *gdbarch, struct readable_regcache *regcache, int regnum, gdb_byte *buf)
Definition: csky-tdep.c:2564
static const char * csky_supported_tdesc_feature_names[]
Definition: csky-tdep.c:71
static void print_savedreg_msg(int regno, int offsets[], bool print_continuing)
Definition: csky-tdep.c:498
static void csky_add_reggroups(struct gdbarch *gdbarch)
Definition: csky-tdep.c:2353
static lr_type_t csky_analyze_lr_type(struct gdbarch *gdbarch, CORE_ADDR start_pc, CORE_ADDR end_pc)
Definition: csky-tdep.c:2027
static bool csky_debug
Definition: csky-tdep.c:63
static void csky_write_pc(regcache *regcache, CORE_ADDR val)
Definition: csky-tdep.c:583
static struct type * csky_register_type(struct gdbarch *gdbarch, int reg_nr)
Definition: csky-tdep.c:701
static int csky_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *reggroup)
Definition: csky-tdep.c:2365
static int csky_fr0_fr15_reg_check(const struct csky_supported_tdesc_register *reg)
Definition: csky-tdep.c:2473
static const struct csky_supported_tdesc_register csky_supported_ar_regs[]
Definition: csky-tdep.c:216
static const reggroup * cr_reggroup
Definition: csky-tdep.c:65
static CORE_ADDR csky_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: csky-tdep.c:1973
static struct gdbarch * csky_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: csky-tdep.c:2672
static const struct csky_supported_tdesc_register csky_supported_mmu_regs[]
Definition: csky-tdep.c:270
static const struct csky_supported_tdesc_register csky_supported_bank15_regs[]
Definition: csky-tdep.c:282
static const char * csky_pseudo_register_name(struct gdbarch *gdbarch, int regno)
Definition: csky-tdep.c:2518
static int csky_breakpoint_kind_from_pc(struct gdbarch *gdbarch, CORE_ADDR *pcptr)
Definition: csky-tdep.c:1998
static int csky_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: csky-tdep.c:1940
static struct csky_unwind_cache * csky_make_stub_cache(frame_info_ptr this_frame)
Definition: csky-tdep.c:2240
static struct value * csky_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition: csky-tdep.c:2143
static const struct csky_supported_tdesc_register csky_supported_alias_regs[]
Definition: csky-tdep.c:308
static CORE_ADDR csky_read_pc(readable_regcache *regcache)
Definition: csky-tdep.c:573
static struct value * csky_stub_prev_register(frame_info_ptr this_frame, void **this_cache, int prev_regnum)
Definition: csky-tdep.c:2267
static const struct csky_supported_tdesc_register csky_supported_bank0_regs[]
Definition: csky-tdep.c:235
static void csky_stub_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
Definition: csky-tdep.c:2252
static void csky_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, frame_info_ptr this_frame)
Definition: csky-tdep.c:2328
static enum return_value_convention csky_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: csky-tdep.c:871
static const struct csky_supported_tdesc_register csky_supported_gpr_regs[]
Definition: csky-tdep.c:119
void _initialize_csky_tdep()
Definition: csky-tdep.c:2881
static void csky_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: csky-tdep.c:2122
static int csky_get_insn(struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
Definition: csky-tdep.c:544
static int csky_dwarf_reg_to_regnum(struct gdbarch *gdbarch, int dw_reg)
Definition: csky-tdep.c:2426
static const struct csky_supported_tdesc_register * csky_get_supported_register_by_index(int index)
Definition: csky-tdep.c:393
static const char * csky_register_name(struct gdbarch *gdbarch, int reg_nr)
Definition: csky-tdep.c:661
#define CSKY_32_IS_MFCR_FPC(insn)
Definition: csky-tdep.h:338
#define CSKY_32_PUSH_LIST2(insn)
Definition: csky-tdep.h:255
#define CSKY_JMPI_PC_4
Definition: csky-tdep.h:389
#define FV_PSEUDO_REGNO_FIRST
Definition: csky-tdep.h:115
#define CSKY_16_IS_BR(insn)
Definition: csky-tdep.h:348
#define CSKY_TDESC_REGS_SP_NUMBERED
Definition: csky-tdep.h:107
#define CSKY_TDESC_REGS_ESSENTIAL_VALUE
Definition: csky-tdep.h:109
#define CSKY_32_IS_JMPIX(insn)
Definition: csky-tdep.h:345
#define CSKY_32_IS_MOVI4(x)
Definition: csky-tdep.h:295
#define CSKY_32_PUSH_LIST1(insn)
Definition: csky-tdep.h:254
#define CSKY_32_IS_MFCR_FPSR(insn)
Definition: csky-tdep.h:334
lr_type_t
Definition: csky-tdep.h:27
@ LR_TYPE_FPC
Definition: csky-tdep.h:30
@ LR_TYPE_R15
Definition: csky-tdep.h:28
@ LR_TYPE_EPC
Definition: csky-tdep.h:29
#define CSKY_32_STM_VAL_REGNUM(insn)
Definition: csky-tdep.h:175
#define CSKY_32_IS_SUBI0(insn)
Definition: csky-tdep.h:236
#define CSKY_16_STWx0_OFFSET(insn)
Definition: csky-tdep.h:135
#define CSKY_32_IS_BSETI4(x)
Definition: csky-tdep.h:312
#define CSKY_32_IS_SUBI4(x)
Definition: csky-tdep.h:303
#define CSKY_32_IS_PUSH_R15(insn)
Definition: csky-tdep.h:253
#define CSKY_32_IS_LISI4(x)
Definition: csky-tdep.h:310
#define CSKY_32_IS_PUSH_R29(insn)
Definition: csky-tdep.h:252
#define CSKY_32_IS_STWx0(insn)
Definition: csky-tdep.h:166
#define CSKY_16_IS_MOVI4(x)
Definition: csky-tdep.h:268
#define CSKY_TDESC_REGS_LR_NUMBERED
Definition: csky-tdep.h:108
#define CSKY_16_IS_ADDI4(x)
Definition: csky-tdep.h:271
#define CSKY_16_IS_MOV_SP_FP(insn)
Definition: csky-tdep.h:352
#define CSKY_32_STM_SIZE(insn)
Definition: csky-tdep.h:173
#define CSKY_32_IS_STMx0(insn)
Definition: csky-tdep.h:177
#define CSKY_32_IS_JMPI(insn)
Definition: csky-tdep.h:344
#define CSKY_32_IS_BMASKI4(x)
Definition: csky-tdep.h:299
#define CSKY_32_IS_MFCR_EPC(insn)
Definition: csky-tdep.h:336
#define CSKY_16_IS_SUBI0(insn)
Definition: csky-tdep.h:231
#define CSKY_16_IS_SUBI4(x)
Definition: csky-tdep.h:273
@ CSKY_MMU_REGNUM
Definition: csky-tdep.h:73
@ CSKY_EPC_REGNUM
Definition: csky-tdep.h:66
@ CSKY_LO_REGNUM
Definition: csky-tdep.h:59
@ CSKY_R0_REGNUM
Definition: csky-tdep.h:56
@ CSKY_RET_REGNUM
Definition: csky-tdep.h:83
@ CSKY_FP_REGNUM
Definition: csky-tdep.h:76
@ CSKY_PROFCR_REGNUM
Definition: csky-tdep.h:74
@ CSKY_PROFGR_REGNUM
Definition: csky-tdep.h:75
@ CSKY_FR0_REGNUM
Definition: csky-tdep.h:70
@ CSKY_ABI_LAST_ARG_REGNUM
Definition: csky-tdep.h:87
@ CSKY_ABI_A0_REGNUM
Definition: csky-tdep.h:86
@ CSKY_SP_REGNUM
Definition: csky-tdep.h:82
@ CSKY_VBR_REGNUM
Definition: csky-tdep.h:63
@ CSKY_FR16_REGNUM
Definition: csky-tdep.h:71
@ CSKY_VR0_REGNUM
Definition: csky-tdep.h:79
@ CSKY_FCR_REGNUM
Definition: csky-tdep.h:72
@ CSKY_CR0_REGNUM
Definition: csky-tdep.h:62
@ CSKY_AR0_REGNUM
Definition: csky-tdep.h:61
@ CSKY_FPC_REGNUM
Definition: csky-tdep.h:67
@ CSKY_LR_REGNUM
Definition: csky-tdep.h:90
@ CSKY_PC_REGNUM
Definition: csky-tdep.h:60
@ CSKY_HI_REGNUM
Definition: csky-tdep.h:58
@ CSKY_EPSR_REGNUM
Definition: csky-tdep.h:64
#define CSKY_32_IS_BCLRI4(x)
Definition: csky-tdep.h:314
#define FV_PSEUDO_REGNO_LAST
Definition: csky-tdep.h:116
#define CSKY_16_SUBI_IMM(insn)
Definition: csky-tdep.h:233
#define CSKY_16_IS_PUSH(insn)
Definition: csky-tdep.h:241
#define CSKY_16_ST_VAL_REGNUM(insn)
Definition: csky-tdep.h:128
#define CSKY_32_IS_NOR4(x)
Definition: csky-tdep.h:306
#define CSKY_32_SUBI_IMM(insn)
Definition: csky-tdep.h:238
#define CSKY_32_IS_RFI(insn)
Definition: csky-tdep.h:341
#define CSKY_16_IS_MOV_FP_SP(insn)
Definition: csky-tdep.h:350
#define CSKY_16_ST_OFFSET(insn)
Definition: csky-tdep.h:126
#define CSKY_16_IS_JMPIX(insn)
Definition: csky-tdep.h:346
#define CSKY_16_IS_NOR4(x)
Definition: csky-tdep.h:276
#define CSKY_16_IS_JMP(insn)
Definition: csky-tdep.h:343
#define CSKY_32_ST_OFFSET(insn)
Definition: csky-tdep.h:161
#define CSKY_32_IS_JMP(insn)
Definition: csky-tdep.h:342
#define CSKY_FULL16_ONEHOT_VALUE
Definition: csky-tdep.h:112
#define CSKY_32_ST_VAL_REGNUM(insn)
Definition: csky-tdep.h:163
#define CSKY_NUM_GREGS_SAVED_GREGS
Definition: csky-tdep.h:357
#define CSKY_16_IS_LRW4(x)
Definition: csky-tdep.h:266
#define CSKY_32_IS_MOVIH4(x)
Definition: csky-tdep.h:297
#define CSKY_16_IS_BSETI4(x)
Definition: csky-tdep.h:281
@ CSKY_INSN_SIZE16
Definition: csky-tdep.h:49
@ CSKY_INSN_SIZE32
Definition: csky-tdep.h:50
#define CSKY_32_INSN_MASK
Definition: csky-tdep.h:353
#define CSKY_BKPT_INSN
Definition: csky-tdep.h:354
#define CSKY_32_IS_ROTLI4(x)
Definition: csky-tdep.h:308
#define CSKY_IS_R4_ADJUSTER(x)
Definition: csky-tdep.h:327
#define CSKY_32_IS_PUSH(insn)
Definition: csky-tdep.h:251
#define CSKY_16_IS_LSLI4(x)
Definition: csky-tdep.h:279
#define CSKY_32_IS_IXW4(x)
Definition: csky-tdep.h:318
#define CSKY_32_IS_IXH4(x)
Definition: csky-tdep.h:316
#define CSKY_16_IS_BCLRI4(x)
Definition: csky-tdep.h:283
#define CSKY_IS_SUBU4(x)
Definition: csky-tdep.h:329
#define CSKY_NUM_REGS
Definition: csky-tdep.h:119
#define CSKY_16_IS_PUSH_R15(insn)
Definition: csky-tdep.h:242
#define CSKY_32_IS_MOV_FP_SP(insn)
Definition: csky-tdep.h:351
#define CSKY_NUM_GREGS
Definition: csky-tdep.h:355
#define CSKY_JMP_T1_VS_NOP
Definition: csky-tdep.h:391
#define CSKY_LRW_T1_PC_8
Definition: csky-tdep.h:390
#define CSKY_32_IS_LRW4(x)
Definition: csky-tdep.h:293
#define CSKY_16_PUSH_LIST1(insn)
Definition: csky-tdep.h:243
#define CSKY_16_IS_STWx0(insn)
Definition: csky-tdep.h:131
#define CSKY_32_IS_ADDI4(x)
Definition: csky-tdep.h:301
#define CSKY_32_IS_BR(insn)
Definition: csky-tdep.h:349
#define CSKY_32_IS_MFCR_EPSR(insn)
Definition: csky-tdep.h:332
#define CSKY_32_IS_RTE(insn)
Definition: csky-tdep.h:340
#define CSKY_TDESC_REGS_PC_NUMBERED
Definition: csky-tdep.h:106
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition: defs.h:561
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition: defs.h:526
return_value_convention
Definition: defs.h:258
@ RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:261
@ RETURN_VALUE_STRUCT_CONVENTION
Definition: defs.h:268
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition: frame.c:1361
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, frame_info_ptr))
Definition: frame.c:659
@ DWARF2_FRAME_REG_RA
Definition: frame.h:61
@ DWARF2_FRAME_REG_CFA
Definition: frame.h:63
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:217
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
Definition: frame-unwind.c:227
struct value * frame_unwind_got_constant(frame_info_ptr frame, int regnum, ULONGEST val)
Definition: frame-unwind.c:299
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:107
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition: frame.c:1351
ULONGEST frame_unwind_register_unsigned(frame_info_ptr next_frame, int regnum)
Definition: frame.c:1323
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition: frame.c:2592
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:713
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition: frame.c:2907
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition: frame.c:1050
CORE_ADDR get_frame_address_in_block(frame_info_ptr this_frame)
Definition: frame.c:2622
@ NORMAL_FRAME
Definition: frame.h:179
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:608
@ sp_regnum
Definition: frv-tdep.h:35
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1467
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
void set_gdbarch_addr_bit(struct gdbarch *gdbarch, int addr_bit)
Definition: gdbarch.c:1719
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2023
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
Definition: gdbarch.c:1755
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1370
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition: gdbarch.c:2142
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_write_pc(struct gdbarch *gdbarch, gdbarch_write_pc_ftype *write_pc)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_overlay_update(struct gdbarch *gdbarch, gdbarch_overlay_update_ftype *overlay_update)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1433
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
int gdbarch_num_regs(struct gdbarch *gdbarch)
Definition: gdbarch.c:1899
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1583
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
Definition: gdbarch.c:1379
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2016
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2006
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2033
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
const struct target_desc * gdbarch_target_desc(struct gdbarch *gdbarch)
Definition: gdbarch.c:1397
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1550
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1416
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
Definition: gdbarch.c:1927
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1450
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1701
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:1910
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_read_pc(struct gdbarch *gdbarch, gdbarch_read_pc_ftype *read_pc)
void set_gdbarch_double_format(struct gdbarch *gdbarch, const struct floatformat **double_format)
Definition: gdbarch.c:1599
void set_gdbarch_float_format(struct gdbarch *gdbarch, const struct floatformat **float_format)
Definition: gdbarch.c:1566
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
Definition: gdbarch.c:264
function_call_return_method
Definition: gdbarch.h:112
@ return_method_struct
Definition: gdbarch.h:124
struct type * arch_composite_type(struct gdbarch *gdbarch, const char *name, enum type_code code)
Definition: gdbtypes.c:5989
struct type * init_vector_type(struct type *elt_type, int n)
Definition: gdbtypes.c:1540
const struct floatformat * floatformats_ieee_single[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:83
struct type * arch_float_type(struct gdbarch *gdbarch, int bit, const char *name, const struct floatformat **floatformats)
Definition: gdbtypes.c:5888
const struct floatformat * floatformats_ieee_double[BFD_ENDIAN_UNKNOWN]
Definition: gdbtypes.c:87
void append_composite_type_field(struct type *t, const char *name, struct type *field)
Definition: gdbtypes.c:6065
struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:3010
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
Definition: gnu-nat.c:1791
unsigned dummy
Definition: go32-nat.c:8
size_t size
Definition: go32-nat.c:241
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
Definition: minsyms.c:977
def info(c)
Definition: gdbarch.py:184
static int in_plt_section(CORE_ADDR pc)
Definition: objfiles.h:901
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: osabi.c:382
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:819
const reggroup *const general_reggroup
Definition: reggroups.c:251
const reggroup * reggroup_new(const char *name, enum reggroup_type type)
Definition: reggroups.c:34
const reggroup *const save_reggroup
Definition: reggroups.c:256
const reggroup *const all_reggroup
Definition: reggroups.c:255
void reggroup_add(struct gdbarch *gdbarch, const reggroup *group)
Definition: reggroups.c:124
const reggroup *const restore_reggroup
Definition: reggroups.c:257
@ USER_REGGROUP
Definition: reggroups.h:32
Definition: block.h:109
CORE_ADDR start() const
Definition: block.h:111
CORE_ADDR end() const
Definition: block.h:119
struct minimal_symbol * minsym
Definition: minsyms.h:49
struct type * builtin_int8
Definition: gdbtypes.h:2281
struct type * builtin_func_ptr
Definition: gdbtypes.h:2314
struct type * builtin_data_ptr
Definition: gdbtypes.h:2303
struct type * builtin_uint64
Definition: gdbtypes.h:2290
struct type * builtin_int32
Definition: gdbtypes.h:2287
struct type * builtin_int16
Definition: gdbtypes.h:2283
unsigned int fpu_hardfp
Definition: csky-tdep.h:38
unsigned int vdsp_version
Definition: csky-tdep.h:39
unsigned int fpu_abi
Definition: csky-tdep.h:37
unsigned int has_vr0
Definition: csky-tdep.h:42
unsigned int fv_pseudo_registers_count
Definition: csky-tdep.h:43
csky_stack_item(int len_, const gdb_byte *data_)
Definition: csky-tdep.c:759
const gdb_byte * data
Definition: csky-tdep.c:764
CORE_ADDR prev_sp
Definition: csky-tdep.c:936
trad_frame_saved_reg * saved_regs
Definition: csky-tdep.c:947
enum dwarf2_frame_reg_rule how
Definition: frame.h:86
unsigned long size() const
Definition: symtab.h:756
void set_addr(LONGEST addr)
Definition: trad-frame.h:102
void set_value(LONGEST val)
Definition: trad-frame.h:88
Definition: gdbtypes.h:922
ULONGEST length() const
Definition: gdbtypes.h:954
void set_name(const char *name)
Definition: gdbtypes.h:945
void set_is_vector(bool is_vector)
Definition: gdbtypes.h:1154
Definition: value.c:181
void simple_overlay_update(struct obj_section *osect)
Definition: symfile.c:3508
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
Definition: symtab.c:3956
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
void set_tdesc_pseudo_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *pseudo_name)
int tdesc_has_registers(const struct target_desc *target_desc)
struct type * tdesc_register_type(struct gdbarch *gdbarch, int regno)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
int tdesc_register_in_reggroup_p(struct gdbarch *gdbarch, int regno, const struct reggroup *reggroup)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1771
@ TARGET_XFER_E_IO
Definition: target.h:227
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
Definition: trad-frame.c:62
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:187
int user_reg_map_name_to_regnum(struct gdbarch *gdbarch, const char *name, int len)
Definition: user-regs.c:132
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: utils.c:3114
void gdb_printf(struct ui_file *stream, const char *format,...)
Definition: utils.c:1865
#define gdb_stdlog
Definition: utils.h:196
struct type * value_type(const struct value *value)
Definition: value.c:1109
gdb::array_view< const gdb_byte > value_contents(struct value *value)
Definition: value.c:1464