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/tmp/gdb-13.1/gdb/arm-linux-nat.c
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1/* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2023 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
18
19#include "defs.h"
20#include "inferior.h"
21#include "gdbcore.h"
22#include "regcache.h"
23#include "target.h"
24#include "linux-nat.h"
25#include "target-descriptions.h"
26#include "auxv.h"
27#include "observable.h"
28#include "gdbthread.h"
29
30#include "aarch32-tdep.h"
31#include "arm-tdep.h"
32#include "arm-linux-tdep.h"
33#include "aarch32-linux-nat.h"
34
35#include <elf/common.h>
36#include <sys/user.h>
37#include "nat/gdb_ptrace.h"
38#include <sys/utsname.h>
39#include <sys/procfs.h>
40
41#include "nat/linux-ptrace.h"
42#include "linux-tdep.h"
43
44/* Prototypes for supply_gregset etc. */
45#include "gregset.h"
46
47/* Defines ps_err_e, struct ps_prochandle. */
48#include "gdb_proc_service.h"
49
50#ifndef PTRACE_GET_THREAD_AREA
51#define PTRACE_GET_THREAD_AREA 22
52#endif
53
54#ifndef PTRACE_GETWMMXREGS
55#define PTRACE_GETWMMXREGS 18
56#define PTRACE_SETWMMXREGS 19
57#endif
58
59#ifndef PTRACE_GETVFPREGS
60#define PTRACE_GETVFPREGS 27
61#define PTRACE_SETVFPREGS 28
62#endif
63
64#ifndef PTRACE_GETHBPREGS
65#define PTRACE_GETHBPREGS 29
66#define PTRACE_SETHBPREGS 30
67#endif
68
70{
71public:
72 /* Add our register access methods. */
73 void fetch_registers (struct regcache *, int) override;
74 void store_registers (struct regcache *, int) override;
75
76 /* Add our hardware breakpoint and watchpoint implementation. */
77 int can_use_hw_breakpoint (enum bptype, int, int) override;
78
79 int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
80
81 int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
82
83 int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
84
85 int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
86 struct expression *) override;
87
88 int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
89 struct expression *) override;
90 bool stopped_by_watchpoint () override;
91
92 bool stopped_data_address (CORE_ADDR *) override;
93
94 bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
95
96 const struct target_desc *read_description () override;
97
98 /* Override linux_nat_target low methods. */
99
100 /* Handle thread creation and exit. */
101 void low_new_thread (struct lwp_info *lp) override;
102 void low_delete_thread (struct arch_lwp_info *lp) override;
103 void low_prepare_to_resume (struct lwp_info *lp) override;
104
105 /* Handle process creation and exit. */
106 void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
107 void low_forget_process (pid_t pid) override;
108};
109
111
112/* Get the whole floating point state of the process and store it
113 into regcache. */
114
115static void
117{
118 int ret, regno, tid;
119 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
120
121 /* Get the thread id for the ptrace call. */
122 tid = regcache->ptid ().lwp ();
123
124 /* Read the floating point state. */
125 if (have_ptrace_getregset == TRIBOOL_TRUE)
126 {
127 struct iovec iov;
128
129 iov.iov_base = &fp;
130 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
131
132 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
133 }
134 else
135 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
136
137 if (ret < 0)
138 perror_with_name (_("Unable to fetch the floating point registers"));
139
140 /* Fetch fpsr. */
142
143 /* Fetch the floating point registers. */
144 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
145 supply_nwfpe_register (regcache, regno, fp);
146}
147
148/* Save the whole floating point state of the process using
149 the contents from regcache. */
150
151static void
153{
154 int ret, regno, tid;
155 gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
156
157 /* Get the thread id for the ptrace call. */
158 tid = regcache->ptid ().lwp ();
159
160 /* Read the floating point state. */
161 if (have_ptrace_getregset == TRIBOOL_TRUE)
162 {
163 elf_fpregset_t fpregs;
164 struct iovec iov;
165
166 iov.iov_base = &fpregs;
167 iov.iov_len = sizeof (fpregs);
168
169 ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
170 }
171 else
172 ret = ptrace (PT_GETFPREGS, tid, 0, fp);
173
174 if (ret < 0)
175 perror_with_name (_("Unable to fetch the floating point registers"));
176
177 /* Store fpsr. */
178 if (REG_VALID == regcache->get_register_status (ARM_FPS_REGNUM))
180
181 /* Store the floating point registers. */
182 for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
183 if (REG_VALID == regcache->get_register_status (regno))
184 collect_nwfpe_register (regcache, regno, fp);
185
186 if (have_ptrace_getregset == TRIBOOL_TRUE)
187 {
188 struct iovec iov;
189
190 iov.iov_base = &fp;
191 iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
192
193 ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
194 }
195 else
196 ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
197
198 if (ret < 0)
199 perror_with_name (_("Unable to store floating point registers"));
200}
201
202/* Fetch all general registers of the process and store into
203 regcache. */
204
205static void
207{
208 int ret, tid;
209 elf_gregset_t regs;
210
211 /* Get the thread id for the ptrace call. */
212 tid = regcache->ptid ().lwp ();
213
214 if (have_ptrace_getregset == TRIBOOL_TRUE)
215 {
216 struct iovec iov;
217
218 iov.iov_base = &regs;
219 iov.iov_len = sizeof (regs);
220
221 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
222 }
223 else
224 ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
225
226 if (ret < 0)
227 perror_with_name (_("Unable to fetch general registers"));
228
229 aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
230}
231
232static void
234{
235 int ret, tid;
236 elf_gregset_t regs;
237
238 /* Get the thread id for the ptrace call. */
239 tid = regcache->ptid ().lwp ();
240
241 /* Fetch the general registers. */
242 if (have_ptrace_getregset == TRIBOOL_TRUE)
243 {
244 struct iovec iov;
245
246 iov.iov_base = &regs;
247 iov.iov_len = sizeof (regs);
248
249 ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
250 }
251 else
252 ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
253
254 if (ret < 0)
255 perror_with_name (_("Unable to fetch general registers"));
256
258
259 if (have_ptrace_getregset == TRIBOOL_TRUE)
260 {
261 struct iovec iov;
262
263 iov.iov_base = &regs;
264 iov.iov_len = sizeof (regs);
265
266 ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
267 }
268 else
269 ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
270
271 if (ret < 0)
272 perror_with_name (_("Unable to store general registers"));
273}
274
275/* Fetch all WMMX registers of the process and store into
276 regcache. */
277
278static void
280{
281 char regbuf[IWMMXT_REGS_SIZE];
282 int ret, regno, tid;
283
284 /* Get the thread id for the ptrace call. */
285 tid = regcache->ptid ().lwp ();
286
287 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
288 if (ret < 0)
289 perror_with_name (_("Unable to fetch WMMX registers"));
290
291 for (regno = 0; regno < 16; regno++)
292 regcache->raw_supply (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
293
294 for (regno = 0; regno < 2; regno++)
296 &regbuf[16 * 8 + regno * 4]);
297
298 for (regno = 0; regno < 4; regno++)
300 &regbuf[16 * 8 + 2 * 4 + regno * 4]);
301}
302
303static void
305{
306 char regbuf[IWMMXT_REGS_SIZE];
307 int ret, regno, tid;
308
309 /* Get the thread id for the ptrace call. */
310 tid = regcache->ptid ().lwp ();
311
312 ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
313 if (ret < 0)
314 perror_with_name (_("Unable to fetch WMMX registers"));
315
316 for (regno = 0; regno < 16; regno++)
317 if (REG_VALID == regcache->get_register_status (regno + ARM_WR0_REGNUM))
318 regcache->raw_collect (regno + ARM_WR0_REGNUM, &regbuf[regno * 8]);
319
320 for (regno = 0; regno < 2; regno++)
321 if (REG_VALID == regcache->get_register_status (regno + ARM_WCSSF_REGNUM))
323 &regbuf[16 * 8 + regno * 4]);
324
325 for (regno = 0; regno < 4; regno++)
326 if (REG_VALID == regcache->get_register_status (regno + ARM_WCGR0_REGNUM))
328 &regbuf[16 * 8 + 2 * 4 + regno * 4]);
329
330 ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
331
332 if (ret < 0)
333 perror_with_name (_("Unable to store WMMX registers"));
334}
335
336static void
338{
339 gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
340 int ret, tid;
341 struct gdbarch *gdbarch = regcache->arch ();
342 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
343
344 /* Get the thread id for the ptrace call. */
345 tid = regcache->ptid ().lwp ();
346
347 if (have_ptrace_getregset == TRIBOOL_TRUE)
348 {
349 struct iovec iov;
350
351 iov.iov_base = regbuf;
352 iov.iov_len = ARM_VFP3_REGS_SIZE;
353 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
354 }
355 else
356 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
357
358 if (ret < 0)
359 perror_with_name (_("Unable to fetch VFP registers"));
360
362 tdep->vfp_register_count);
363}
364
365static void
367{
368 gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
369 int ret, tid;
370 struct gdbarch *gdbarch = regcache->arch ();
371 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
372
373 /* Get the thread id for the ptrace call. */
374 tid = regcache->ptid ().lwp ();
375
376 if (have_ptrace_getregset == TRIBOOL_TRUE)
377 {
378 struct iovec iov;
379
380 iov.iov_base = regbuf;
381 iov.iov_len = ARM_VFP3_REGS_SIZE;
382 ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
383 }
384 else
385 ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
386
387 if (ret < 0)
388 perror_with_name (_("Unable to fetch VFP registers (for update)"));
389
391 tdep->vfp_register_count);
392
393 if (have_ptrace_getregset == TRIBOOL_TRUE)
394 {
395 struct iovec iov;
396
397 iov.iov_base = regbuf;
398 iov.iov_len = ARM_VFP3_REGS_SIZE;
399 ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
400 }
401 else
402 ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
403
404 if (ret < 0)
405 perror_with_name (_("Unable to store VFP registers"));
406}
407
408/* Fetch registers from the child process. Fetch all registers if
409 regno == -1, otherwise fetch all general registers or all floating
410 point registers depending upon the value of regno. */
411
412void
414{
415 struct gdbarch *gdbarch = regcache->arch ();
416 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
417
418 if (-1 == regno)
419 {
421 if (tdep->have_wmmx_registers)
423 if (tdep->vfp_register_count > 0)
425 if (tdep->have_fpa_registers)
427 }
428 else
429 {
430 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
432 else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
434 else if (tdep->have_wmmx_registers
435 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
437 else if (tdep->vfp_register_count > 0
438 && regno >= ARM_D0_REGNUM
439 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
440 || regno == ARM_FPSCR_REGNUM))
442 }
443}
444
445/* Store registers back into the inferior. Store all registers if
446 regno == -1, otherwise store all general registers or all floating
447 point registers depending upon the value of regno. */
448
449void
451{
452 struct gdbarch *gdbarch = regcache->arch ();
453 arm_gdbarch_tdep *tdep = gdbarch_tdep<arm_gdbarch_tdep> (gdbarch);
454
455 if (-1 == regno)
456 {
458 if (tdep->have_wmmx_registers)
460 if (tdep->vfp_register_count > 0)
462 if (tdep->have_fpa_registers)
464 }
465 else
466 {
467 if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
469 else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
471 else if (tdep->have_wmmx_registers
472 && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
474 else if (tdep->vfp_register_count > 0
475 && regno >= ARM_D0_REGNUM
476 && (regno < ARM_D0_REGNUM + tdep->vfp_register_count
477 || regno == ARM_FPSCR_REGNUM))
479 }
480}
481
482/* Wrapper functions for the standard regset handling, used by
483 thread debugging. */
484
485void
487 gdb_gregset_t *gregsetp, int regno)
488{
489 arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
490}
491
492void
494{
495 arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
496}
497
498void
500 gdb_fpregset_t *fpregsetp, int regno)
501{
502 arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
503}
504
505/* Fill GDB's register array with the floating-point register values
506 in *fpregsetp. */
507
508void
510{
511 arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
512}
513
514/* Fetch the thread-local storage pointer for libthread_db. */
515
516ps_err_e
518 lwpid_t lwpid, int idx, void **base)
519{
520 if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
521 return PS_ERR;
522
523 /* IDX is the bias from the thread pointer to the beginning of the
524 thread descriptor. It has to be subtracted due to implementation
525 quirks in libthread_db. */
526 *base = (void *) ((char *)*base - idx);
527
528 return PS_OK;
529}
530
531const struct target_desc *
533{
534 CORE_ADDR arm_hwcap = linux_get_hwcap ();
535
536 if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
537 {
538 elf_gregset_t gpregs;
539 struct iovec iov;
540 int tid = inferior_ptid.pid ();
541
542 iov.iov_base = &gpregs;
543 iov.iov_len = sizeof (gpregs);
544
545 /* Check if PTRACE_GETREGSET works. */
546 if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
547 have_ptrace_getregset = TRIBOOL_FALSE;
548 else
549 have_ptrace_getregset = TRIBOOL_TRUE;
550 }
551
552 if (arm_hwcap & HWCAP_IWMMXT)
554
555 if (arm_hwcap & HWCAP_VFP)
556 {
557 /* Make sure that the kernel supports reading VFP registers. Support was
558 added in 2.6.30. */
559 int pid = inferior_ptid.pid ();
560 errno = 0;
561 char *buf = (char *) alloca (ARM_VFP3_REGS_SIZE);
562 if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0 && errno == EIO)
563 return nullptr;
564
565 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
566 Neon with VFPv3-D32. */
567 if (arm_hwcap & HWCAP_NEON)
568 return aarch32_read_description ();
569 else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
571
573 }
574
575 return this->beneath ()->read_description ();
576}
577
578/* Information describing the hardware breakpoint capabilities. */
580{
581 gdb_byte arch;
583 gdb_byte wp_count;
584 gdb_byte bp_count;
585};
586
587/* Since we cannot dynamically allocate subfields of arm_linux_process_info,
588 assume a maximum number of supported break-/watchpoints. */
589#define MAX_BPTS 16
590#define MAX_WPTS 16
591
592/* Get hold of the Hardware Breakpoint information for the target we are
593 attached to. Returns NULL if the kernel doesn't support Hardware
594 breakpoints at all, or a pointer to the information structure. */
595static const struct arm_linux_hwbp_cap *
597{
598 /* The info structure we return. */
599 static struct arm_linux_hwbp_cap info;
600
601 /* Is INFO in a good state? -1 means that no attempt has been made to
602 initialize INFO; 0 means an attempt has been made, but it failed; 1
603 means INFO is in an initialized state. */
604 static int available = -1;
605
606 if (available == -1)
607 {
608 int tid;
609 unsigned int val;
610
611 tid = inferior_ptid.lwp ();
612 if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
613 available = 0;
614 else
615 {
616 info.arch = (gdb_byte)((val >> 24) & 0xff);
617 info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
618 info.wp_count = (gdb_byte)((val >> 8) & 0xff);
619 info.bp_count = (gdb_byte)(val & 0xff);
620
621 if (info.wp_count > MAX_WPTS)
622 {
623 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
624 supports %d"), MAX_WPTS, info.wp_count);
625 info.wp_count = MAX_WPTS;
626 }
627
628 if (info.bp_count > MAX_BPTS)
629 {
630 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
631 supports %d"), MAX_BPTS, info.bp_count);
632 info.bp_count = MAX_BPTS;
633 }
634 available = (info.arch != 0);
635 }
636 }
637
638 return available == 1 ? &info : NULL;
639}
640
641/* How many hardware breakpoints are available? */
642static int
644{
645 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
646 return cap != NULL ? cap->bp_count : 0;
647}
648
649/* How many hardware watchpoints are available? */
650static int
652{
653 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
654 return cap != NULL ? cap->wp_count : 0;
655}
656
657/* Have we got a free break-/watch-point available for use? Returns -1 if
658 there is not an appropriate resource available, otherwise returns 1. */
659int
661 int cnt, int ot)
662{
665 {
667
668 if (count == 0)
669 return 0;
670 else if (cnt + ot > count)
671 return -1;
672 }
673 else if (type == bp_hardware_breakpoint)
674 {
676
677 if (count == 0)
678 return 0;
679 else if (cnt > count)
680 return -1;
681 }
682 else
683 gdb_assert_not_reached ("unknown breakpoint type");
684
685 return 1;
686}
687
688/* Enum describing the different types of ARM hardware break-/watch-points. */
689typedef enum
690{
696
697/* Type describing an ARM Hardware Breakpoint Control register value. */
698typedef unsigned int arm_hwbp_control_t;
699
700/* Structure used to keep track of hardware break-/watch-points. */
702{
703 /* Address to break on, or being watched. */
704 unsigned int address;
705 /* Control register for break-/watch- point. */
707};
708
709/* Structure containing arrays of per process hardware break-/watchpoints
710 for caching address and control information.
711
712 The Linux ptrace interface to hardware break-/watch-points presents the
713 values in a vector centred around 0 (which is used fo generic information).
714 Positive indicies refer to breakpoint addresses/control registers, negative
715 indices to watchpoint addresses/control registers.
716
717 The Linux vector is indexed as follows:
718 -((i << 1) + 2): Control register for watchpoint i.
719 -((i << 1) + 1): Address register for watchpoint i.
720 0: Information register.
721 ((i << 1) + 1): Address register for breakpoint i.
722 ((i << 1) + 2): Control register for breakpoint i.
723
724 This structure is used as a per-thread cache of the state stored by the
725 kernel, so that we don't need to keep calling into the kernel to find a
726 free breakpoint.
727
728 We treat break-/watch-points with their enable bit clear as being deleted.
729 */
731{
732 /* Hardware breakpoints for this process. */
734 /* Hardware watchpoints for this process. */
736};
737
738/* Per-process arch-specific data we want to keep. */
740{
741 /* Linked list. */
743 /* The process identifier. */
744 pid_t pid;
745 /* Hardware break-/watchpoints state information. */
747
748};
749
750/* Per-thread arch-specific data we want to keep. */
752{
753 /* Non-zero if our copy differs from what's recorded in the thread. */
756};
757
759
760/* Find process data for process PID. */
761
762static struct arm_linux_process_info *
764{
766
768 if (proc->pid == pid)
769 return proc;
770
771 return NULL;
772}
773
774/* Add process data for process PID. Returns newly allocated info
775 object. */
776
777static struct arm_linux_process_info *
779{
781
782 proc = XCNEW (struct arm_linux_process_info);
783 proc->pid = pid;
784
787
788 return proc;
789}
790
791/* Get data specific info for process PID, creating it if necessary.
792 Never returns NULL. */
793
794static struct arm_linux_process_info *
796{
798
800 if (proc == NULL)
802
803 return proc;
804}
805
806/* Called whenever GDB is no longer debugging process PID. It deletes
807 data structures that keep track of debug register state. */
808
809void
811{
812 struct arm_linux_process_info *proc, **proc_link;
813
815 proc_link = &arm_linux_process_list;
816
817 while (proc != NULL)
818 {
819 if (proc->pid == pid)
820 {
821 *proc_link = proc->next;
822
823 xfree (proc);
824 return;
825 }
826
827 proc_link = &proc->next;
828 proc = *proc_link;
829 }
830}
831
832/* Get hardware break-/watchpoint state for process PID. */
833
834static struct arm_linux_debug_reg_state *
836{
838}
839
840/* Initialize an ARM hardware break-/watch-point control register value.
841 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
842 type of break-/watch-point; ENABLE indicates whether the point is enabled.
843 */
844static arm_hwbp_control_t
845arm_hwbp_control_initialize (unsigned byte_address_select,
846 arm_hwbp_type hwbp_type,
847 int enable)
848{
849 gdb_assert ((byte_address_select & ~0xffU) == 0);
850 gdb_assert (hwbp_type != arm_hwbp_break
851 || ((byte_address_select & 0xfU) != 0));
852
853 return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
854}
855
856/* Does the breakpoint control value CONTROL have the enable bit set? */
857static int
859{
860 return control & 0x1;
861}
862
863/* Change a breakpoint control word so that it is in the disabled state. */
866{
867 return control & ~0x1;
868}
869
870/* Initialise the hardware breakpoint structure P. The breakpoint will be
871 enabled, and will point to the placed address of BP_TGT. */
872static void
874 struct bp_target_info *bp_tgt,
875 struct arm_linux_hw_breakpoint *p)
876{
877 unsigned mask;
878 CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
879
880 /* We have to create a mask for the control register which says which bits
881 of the word pointed to by address to break on. */
882 if (arm_pc_is_thumb (gdbarch, address))
883 {
884 mask = 0x3;
885 address &= ~1;
886 }
887 else
888 {
889 mask = 0xf;
890 address &= ~3;
891 }
892
893 p->address = (unsigned int) address;
895}
896
897/* Get the ARM hardware breakpoint type from the TYPE value we're
898 given when asked to set a watchpoint. */
899static arm_hwbp_type
900arm_linux_get_hwbp_type (enum target_hw_bp_type type)
901{
902 if (type == hw_read)
903 return arm_hwbp_load;
904 else if (type == hw_write)
905 return arm_hwbp_store;
906 else
907 return arm_hwbp_access;
908}
909
910/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
911 to LEN. The type of watchpoint is given in RW. */
912static void
913arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
914 enum target_hw_bp_type type,
915 struct arm_linux_hw_breakpoint *p)
916{
917 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
918 unsigned mask;
919
920 gdb_assert (cap != NULL);
921 gdb_assert (cap->max_wp_length != 0);
922
923 mask = (1 << len) - 1;
924
925 p->address = (unsigned int) addr;
928}
929
930/* Are two break-/watch-points equal? */
931static int
933 const struct arm_linux_hw_breakpoint *p2)
934{
935 return p1->address == p2->address && p1->control == p2->control;
936}
937
938/* Callback to mark a watch-/breakpoint to be updated in all threads of
939 the current process. */
940
941static int
942update_registers_callback (struct lwp_info *lwp, int watch, int index)
943{
944 if (lwp->arch_private == NULL)
945 lwp->arch_private = XCNEW (struct arch_lwp_info);
946
947 /* The actual update is done later just before resuming the lwp,
948 we just mark that the registers need updating. */
949 if (watch)
950 lwp->arch_private->wpts_changed[index] = 1;
951 else
952 lwp->arch_private->bpts_changed[index] = 1;
953
954 /* If the lwp isn't stopped, force it to momentarily pause, so
955 we can update its breakpoint registers. */
956 if (!lwp->stopped)
957 linux_stop_lwp (lwp);
958
959 return 0;
960}
961
962/* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
963 =1) BPT for thread TID. */
964static void
966 int watchpoint)
967{
968 int pid;
969 ptid_t pid_ptid;
970 gdb_byte count, i;
971 struct arm_linux_hw_breakpoint* bpts;
972
973 pid = inferior_ptid.pid ();
974 pid_ptid = ptid_t (pid);
975
976 if (watchpoint)
977 {
980 }
981 else
982 {
985 }
986
987 for (i = 0; i < count; ++i)
989 {
990 bpts[i] = *bpt;
991 iterate_over_lwps (pid_ptid,
992 [=] (struct lwp_info *info)
993 {
995 i);
996 });
997 break;
998 }
999
1000 gdb_assert (i != count);
1001}
1002
1003/* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1004 (WATCHPOINT = 1) BPT for thread TID. */
1005static void
1007 int watchpoint)
1008{
1009 int pid;
1010 gdb_byte count, i;
1011 ptid_t pid_ptid;
1012 struct arm_linux_hw_breakpoint* bpts;
1013
1014 pid = inferior_ptid.pid ();
1015 pid_ptid = ptid_t (pid);
1016
1017 if (watchpoint)
1018 {
1021 }
1022 else
1023 {
1026 }
1027
1028 for (i = 0; i < count; ++i)
1029 if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1030 {
1031 bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1032 iterate_over_lwps (pid_ptid,
1033 [=] (struct lwp_info *info)
1034 {
1036 i);
1037 });
1038 break;
1039 }
1040
1041 gdb_assert (i != count);
1042}
1043
1044/* Insert a Hardware breakpoint. */
1045int
1047 struct bp_target_info *bp_tgt)
1048{
1049 struct arm_linux_hw_breakpoint p;
1050
1052 return -1;
1053
1055
1057
1058 return 0;
1059}
1060
1061/* Remove a hardware breakpoint. */
1062int
1064 struct bp_target_info *bp_tgt)
1065{
1066 struct arm_linux_hw_breakpoint p;
1067
1069 return -1;
1070
1072
1074
1075 return 0;
1076}
1077
1078/* Are we able to use a hardware watchpoint for the LEN bytes starting at
1079 ADDR? */
1080int
1082{
1083 const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1084 CORE_ADDR max_wp_length, aligned_addr;
1085
1086 /* Can not set watchpoints for zero or negative lengths. */
1087 if (len <= 0)
1088 return 0;
1089
1090 /* Need to be able to use the ptrace interface. */
1091 if (cap == NULL || cap->wp_count == 0)
1092 return 0;
1093
1094 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1095 range covered by a watchpoint. */
1096 max_wp_length = (CORE_ADDR)cap->max_wp_length;
1097 aligned_addr = addr & ~(max_wp_length - 1);
1098
1099 if (aligned_addr + max_wp_length < addr + len)
1100 return 0;
1101
1102 /* The current ptrace interface can only handle watchpoints that are a
1103 power of 2. */
1104 if ((len & (len - 1)) != 0)
1105 return 0;
1106
1107 /* All tests passed so we must be able to set a watchpoint. */
1108 return 1;
1109}
1110
1111/* Insert a Hardware breakpoint. */
1112int
1114 enum target_hw_bp_type rw,
1115 struct expression *cond)
1116{
1117 struct arm_linux_hw_breakpoint p;
1118
1120 return -1;
1121
1122 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1123
1125
1126 return 0;
1127}
1128
1129/* Remove a hardware breakpoint. */
1130int
1132 int len, enum target_hw_bp_type rw,
1133 struct expression *cond)
1134{
1135 struct arm_linux_hw_breakpoint p;
1136
1138 return -1;
1139
1140 arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1141
1143
1144 return 0;
1145}
1146
1147/* What was the data address the target was stopped on accessing. */
1148bool
1150{
1151 siginfo_t siginfo;
1152 int slot;
1153
1154 if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1155 return false;
1156
1157 /* This must be a hardware breakpoint. */
1158 if (siginfo.si_signo != SIGTRAP
1159 || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1160 return false;
1161
1162 /* We must be able to set hardware watchpoints. */
1164 return 0;
1165
1166 slot = siginfo.si_errno;
1167
1168 /* If we are in a positive slot then we're looking at a breakpoint and not
1169 a watchpoint. */
1170 if (slot >= 0)
1171 return false;
1172
1173 *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1174 return true;
1175}
1176
1177/* Has the target been stopped by hitting a watchpoint? */
1178bool
1180{
1181 CORE_ADDR addr;
1182 return stopped_data_address (&addr);
1183}
1184
1185bool
1187 CORE_ADDR start,
1188 int length)
1189{
1190 return start <= addr && start + length - 1 >= addr;
1191}
1192
1193/* Handle thread creation. We need to copy the breakpoints and watchpoints
1194 in the parent thread to the child thread. */
1195void
1197{
1198 int i;
1199 struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1200
1201 /* Mark that all the hardware breakpoint/watchpoint register pairs
1202 for this thread need to be initialized. */
1203
1204 for (i = 0; i < MAX_BPTS; i++)
1205 {
1206 info->bpts_changed[i] = 1;
1207 info->wpts_changed[i] = 1;
1208 }
1209
1210 lp->arch_private = info;
1211}
1212
1213/* Function to call when a thread is being deleted. */
1214
1215void
1217{
1218 xfree (arch_lwp);
1219}
1220
1221/* Called when resuming a thread.
1222 The hardware debug registers are updated when there is any change. */
1223
1224void
1226{
1227 int pid, i;
1228 struct arm_linux_hw_breakpoint *bpts, *wpts;
1229 struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1230
1231 pid = lwp->ptid.lwp ();
1232 bpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->bpts;
1233 wpts = arm_linux_get_debug_reg_state (lwp->ptid.pid ())->wpts;
1234
1235 /* NULL means this is the main thread still going through the shell,
1236 or, no watchpoint has been set yet. In that case, there's
1237 nothing to do. */
1238 if (arm_lwp_info == NULL)
1239 return;
1240
1241 for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1242 if (arm_lwp_info->bpts_changed[i])
1243 {
1244 errno = 0;
1245 if (arm_hwbp_control_is_enabled (bpts[i].control))
1247 (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1248 perror_with_name (_("Unexpected error setting breakpoint"));
1249
1250 if (bpts[i].control != 0)
1252 (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1253 perror_with_name (_("Unexpected error setting breakpoint"));
1254
1255 arm_lwp_info->bpts_changed[i] = 0;
1256 }
1257
1258 for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1259 if (arm_lwp_info->wpts_changed[i])
1260 {
1261 errno = 0;
1262 if (arm_hwbp_control_is_enabled (wpts[i].control))
1264 (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1265 perror_with_name (_("Unexpected error setting watchpoint"));
1266
1267 if (wpts[i].control != 0)
1269 (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1270 perror_with_name (_("Unexpected error setting watchpoint"));
1271
1272 arm_lwp_info->wpts_changed[i] = 0;
1273 }
1274}
1275
1276/* linux_nat_new_fork hook. */
1277
1278void
1279arm_linux_nat_target::low_new_fork (struct lwp_info *parent, pid_t child_pid)
1280{
1281 pid_t parent_pid;
1282 struct arm_linux_debug_reg_state *parent_state;
1283 struct arm_linux_debug_reg_state *child_state;
1284
1285 /* NULL means no watchpoint has ever been set in the parent. In
1286 that case, there's nothing to do. */
1287 if (parent->arch_private == NULL)
1288 return;
1289
1290 /* GDB core assumes the child inherits the watchpoints/hw
1291 breakpoints of the parent, and will remove them all from the
1292 forked off process. Copy the debug registers mirrors into the
1293 new process so that all breakpoints and watchpoints can be
1294 removed together. */
1295
1296 parent_pid = parent->ptid.pid ();
1297 parent_state = arm_linux_get_debug_reg_state (parent_pid);
1298 child_state = arm_linux_get_debug_reg_state (child_pid);
1299 *child_state = *parent_state;
1300}
1301
1303void
1305{
1306 /* Register the target. */
1309}
void aarch32_gp_regcache_collect(const struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_gp_regcache_supply(struct regcache *regcache, uint32_t *regs, int arm_apcs_32)
void aarch32_vfp_regcache_collect(const struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
void aarch32_vfp_regcache_supply(struct regcache *regcache, gdb_byte *regs, const int vfp_register_count)
const target_desc * aarch32_read_description()
Definition: aarch32-tdep.c:30
void xfree(void *)
#define HWCAP_NEON
Definition: arm-fbsd-tdep.h:42
#define HWCAP_VFP
Definition: arm-fbsd-tdep.h:41
#define HWCAP_VFPv3
Definition: arm-fbsd-tdep.h:43
#define PTRACE_GET_THREAD_AREA
Definition: arm-linux-nat.c:51
static int arm_linux_get_hw_watchpoint_count(void)
#define MAX_WPTS
void _initialize_arm_linux_nat()
static int arm_linux_hw_breakpoint_equal(const struct arm_linux_hw_breakpoint *p1, const struct arm_linux_hw_breakpoint *p2)
void supply_gregset(struct regcache *regcache, const gdb_gregset_t *gregsetp)
static void fetch_wmmx_regs(struct regcache *regcache)
static struct arm_linux_process_info * arm_linux_add_process(pid_t pid)
static void store_fpregs(const struct regcache *regcache)
unsigned int arm_hwbp_control_t
static void fetch_vfp_regs(struct regcache *regcache)
static arm_linux_nat_target the_arm_linux_nat_target
#define PTRACE_SETHBPREGS
Definition: arm-linux-nat.c:66
static void fetch_fpregs(struct regcache *regcache)
static void store_wmmx_regs(const struct regcache *regcache)
void fill_gregset(const struct regcache *regcache, gdb_gregset_t *gregsetp, int regno)
static void fetch_regs(struct regcache *regcache)
static arm_hwbp_type arm_linux_get_hwbp_type(enum target_hw_bp_type type)
#define PTRACE_GETWMMXREGS
Definition: arm-linux-nat.c:55
void supply_fpregset(struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
ps_err_e ps_get_thread_area(struct ps_prochandle *ph, lwpid_t lwpid, int idx, void **base)
static arm_hwbp_control_t arm_hwbp_control_initialize(unsigned byte_address_select, arm_hwbp_type hwbp_type, int enable)
#define MAX_BPTS
static int update_registers_callback(struct lwp_info *lwp, int watch, int index)
#define PTRACE_SETWMMXREGS
Definition: arm-linux-nat.c:56
static void arm_linux_remove_hw_breakpoint1(const struct arm_linux_hw_breakpoint *bpt, int watchpoint)
static void arm_linux_hw_breakpoint_initialize(struct gdbarch *gdbarch, struct bp_target_info *bp_tgt, struct arm_linux_hw_breakpoint *p)
static void arm_linux_insert_hw_breakpoint1(const struct arm_linux_hw_breakpoint *bpt, int watchpoint)
static void store_regs(const struct regcache *regcache)
static arm_hwbp_control_t arm_hwbp_control_disable(arm_hwbp_control_t control)
#define PTRACE_GETVFPREGS
Definition: arm-linux-nat.c:60
static void store_vfp_regs(const struct regcache *regcache)
static struct arm_linux_process_info * arm_linux_find_process_pid(pid_t pid)
arm_hwbp_type
@ arm_hwbp_store
@ arm_hwbp_break
@ arm_hwbp_load
@ arm_hwbp_access
void fill_fpregset(const struct regcache *regcache, gdb_fpregset_t *fpregsetp, int regno)
static void arm_linux_hw_watchpoint_initialize(CORE_ADDR addr, int len, enum target_hw_bp_type type, struct arm_linux_hw_breakpoint *p)
#define PTRACE_GETHBPREGS
Definition: arm-linux-nat.c:65
static struct arm_linux_process_info * arm_linux_process_list
static struct arm_linux_process_info * arm_linux_process_info_get(pid_t pid)
#define PTRACE_SETVFPREGS
Definition: arm-linux-nat.c:61
static int arm_hwbp_control_is_enabled(arm_hwbp_control_t control)
static struct arm_linux_debug_reg_state * arm_linux_get_debug_reg_state(pid_t pid)
static const struct arm_linux_hwbp_cap * arm_linux_get_hwbp_cap(void)
static int arm_linux_get_hw_breakpoint_count(void)
void arm_linux_supply_gregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs_buf, size_t len)
void arm_linux_supply_nwfpe(const struct regset *regset, struct regcache *regcache, int regnum, const void *regs_buf, size_t len)
void supply_nwfpe_register(struct regcache *regcache, int regno, const gdb_byte *regs)
void arm_linux_collect_nwfpe(const struct regset *regset, const struct regcache *regcache, int regnum, void *regs_buf, size_t len)
void collect_nwfpe_register(const struct regcache *regcache, int regno, gdb_byte *regs)
void arm_linux_collect_gregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs_buf, size_t len)
#define ARM_LINUX_SIZEOF_NWFPE
#define HWCAP_VFPv3D16
#define HWCAP_IWMMXT
#define NWFPE_FPSR_OFFSET
bool arm_apcs_32
Definition: arm-tdep.c:597
int arm_pc_is_thumb(struct gdbarch *gdbarch, CORE_ADDR memaddr)
Definition: arm-tdep.c:712
const target_desc * arm_read_description(arm_fp_type fp_type, bool tls)
Definition: arm-tdep.c:14863
#define ARM_VFP3_REGS_SIZE
Definition: arm.h:170
#define IWMMXT_REGS_SIZE
Definition: arm.h:172
@ ARM_FPSCR_REGNUM
Definition: arm.h:64
@ ARM_PS_REGNUM
Definition: arm.h:52
@ ARM_WCGR7_REGNUM
Definition: arm.h:61
@ ARM_WR0_REGNUM
Definition: arm.h:53
@ ARM_D0_REGNUM
Definition: arm.h:62
@ ARM_F7_REGNUM
Definition: arm.h:50
@ ARM_F0_REGNUM
Definition: arm.h:48
@ ARM_WCSSF_REGNUM
Definition: arm.h:56
@ ARM_WCGR0_REGNUM
Definition: arm.h:59
@ ARM_FPS_REGNUM
Definition: arm.h:51
@ ARM_FP_TYPE_IWMMXT
Definition: arm.h:98
@ ARM_FP_TYPE_VFPV2
Definition: arm.h:96
@ ARM_FP_TYPE_VFPV3
Definition: arm.h:97
bptype
Definition: breakpoint.h:84
@ bp_watchpoint
Definition: breakpoint.h:91
@ bp_hardware_breakpoint
Definition: breakpoint.h:87
@ bp_read_watchpoint
Definition: breakpoint.h:93
@ bp_access_watchpoint
Definition: breakpoint.h:94
@ bp_hardware_watchpoint
Definition: breakpoint.h:92
int remove_hw_breakpoint(struct gdbarch *, struct bp_target_info *) override
int region_ok_for_hw_watchpoint(CORE_ADDR, int) override
int insert_watchpoint(CORE_ADDR, int, enum target_hw_bp_type, struct expression *) override
void low_new_fork(struct lwp_info *parent, pid_t child_pid) override
bool stopped_data_address(CORE_ADDR *) override
void low_new_thread(struct lwp_info *lp) override
void low_delete_thread(struct arch_lwp_info *lp) override
void store_registers(struct regcache *, int) override
bool stopped_by_watchpoint() override
int can_use_hw_breakpoint(enum bptype, int, int) override
const struct target_desc * read_description() override
bool watchpoint_addr_within_range(CORE_ADDR, CORE_ADDR, int) override
void fetch_registers(struct regcache *, int) override
int remove_watchpoint(CORE_ADDR, int, enum target_hw_bp_type, struct expression *) override
void low_forget_process(pid_t pid) override
int insert_hw_breakpoint(struct gdbarch *, struct bp_target_info *) override
void low_prepare_to_resume(struct lwp_info *lp) override
const target_info & info() const override
Definition: inf-child.c:49
gdbarch * arch() const
Definition: regcache.c:230
void raw_collect(int regnum, void *buf) const override
Definition: regcache.c:1118
void raw_supply(int regnum, const void *buf) override
Definition: regcache.c:1053
enum register_status get_register_status(int regnum) const override
Definition: regcache.c:303
ptid_t ptid() const
Definition: regcache.h:407
#define PTRACE_TYPE_ARG3
Definition: config.h:663
#define ptrace(request, pid, addr, data)
Definition: gdb_ptrace.h:141
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int int rusage_t pid_t pid
Definition: gnu-nat.c:1792
unsigned available
Definition: go32-nat.c:7
GDB_FPREGSET_T gdb_fpregset_t
Definition: gregset.h:35
GDB_GREGSET_T gdb_gregset_t
Definition: gregset.h:34
void add_inf_child_target(inf_child_target *target)
Definition: inf-child.c:418
ptid_t inferior_ptid
Definition: infcmd.c:91
void linux_stop_lwp(struct lwp_info *lwp)
Definition: linux-nat.c:2187
bool linux_nat_get_siginfo(ptid_t ptid, siginfo_t *siginfo)
Definition: linux-nat.c:4446
struct lwp_info * iterate_over_lwps(ptid_t filter, gdb::function_view< iterate_over_lwps_ftype > callback)
Definition: linux-nat.c:848
struct linux_nat_target * linux_target
Definition: linux-nat.c:190
enum tribool have_ptrace_getregset
Definition: linux-nat.c:193
#define PTRACE_SETREGSET
Definition: linux-ptrace.h:52
#define PTRACE_GETREGSET
Definition: linux-ptrace.h:48
CORE_ADDR linux_get_hwcap()
Definition: linux-tdep.c:2686
#define PTRACE_GETREGS
#define PTRACE_SETREGS
#define PTRACE_SETFPREGS
#define enable()
Definition: ser-go32.c:239
char bpts_changed[MAX_BPTS]
char wpts_changed[MAX_WPTS]
bool have_wmmx_registers
Definition: arm-tdep.h:99
bool have_fpa_registers
Definition: arm-tdep.h:98
int vfp_register_count
Definition: arm-tdep.h:102
struct arm_linux_hw_breakpoint wpts[MAX_WPTS]
struct arm_linux_hw_breakpoint bpts[MAX_BPTS]
arm_hwbp_control_t control
struct arm_linux_debug_reg_state state
struct arm_linux_process_info * next
CORE_ADDR placed_address
Definition: breakpoint.h:266
CORE_ADDR reqstd_address
Definition: breakpoint.h:269
ptid_t ptid
Definition: linux-nat.h:211
int stopped
Definition: linux-nat.h:222
struct arch_lwp_info * arch_private
Definition: linux-nat.h:279
Definition: gnu-nat.h:58
struct proc * next
Definition: gnu-nat.h:88
target_ops * beneath() const
Definition: target.c:3020
virtual const struct target_desc * read_description() TARGET_DEFAULT_RETURN(NULL)
Definition: gdbtypes.h:922
void perror_with_name(const char *string)
Definition: utils.c:643