38#include "gdb/sim-ppc.h"
46#include "coff/internal.h"
48#include "coff/xcoff.h"
90#define IS_SPE_PSEUDOREG(tdep, regnum) ((tdep)->ppc_ev0_regnum >= 0 \
91 && (regnum) >= (tdep)->ppc_ev0_regnum \
92 && (regnum) < (tdep)->ppc_ev0_regnum + 32)
95#define IS_DFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_dl0_regnum >= 0 \
96 && (regnum) >= (tdep)->ppc_dl0_regnum \
97 && (regnum) < (tdep)->ppc_dl0_regnum + 16)
101#define IS_V_ALIAS_PSEUDOREG(tdep, regnum) (\
102 (tdep)->ppc_v0_alias_regnum >= 0 \
103 && (regnum) >= (tdep)->ppc_v0_alias_regnum \
104 && (regnum) < (tdep)->ppc_v0_alias_regnum + ppc_num_vrs)
107#define IS_VSX_PSEUDOREG(tdep, regnum) ((tdep)->ppc_vsr0_regnum >= 0 \
108 && (regnum) >= (tdep)->ppc_vsr0_regnum \
109 && (regnum) < (tdep)->ppc_vsr0_regnum + ppc_num_vsrs)
112#define IS_EFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_efpr0_regnum >= 0 \
113 && (regnum) >= (tdep)->ppc_efpr0_regnum \
114 && (regnum) < (tdep)->ppc_efpr0_regnum + ppc_num_efprs)
118#define IS_CDFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cdl0_regnum >= 0 \
119 && (regnum) >= (tdep)->ppc_cdl0_regnum \
120 && (regnum) < (tdep)->ppc_cdl0_regnum + 16)
123#define IS_CVSX_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cvsr0_regnum >= 0 \
124 && (regnum) >= (tdep)->ppc_cvsr0_regnum \
125 && (regnum) < (tdep)->ppc_cvsr0_regnum + ppc_num_vsrs)
128#define IS_CEFP_PSEUDOREG(tdep, regnum) ((tdep)->ppc_cefpr0_regnum >= 0 \
129 && (regnum) >= (tdep)->ppc_cefpr0_regnum \
130 && (regnum) < (tdep)->ppc_cefpr0_regnum + ppc_num_efprs)
167 if (per_inf ==
nullptr)
220 return (regno >= tdep->
ppc_vr0_regnum && regno <= tdep->ppc_vrsave_regnum);
289 gdb_assert (table[gdb_regno] == -1);
304 static const char *
const segment_regs[] = {
305 "sr0",
"sr1",
"sr2",
"sr3",
"sr4",
"sr5",
"sr6",
"sr7",
306 "sr8",
"sr9",
"sr10",
"sr11",
"sr12",
"sr13",
"sr14",
"sr15"
311 for (i = 0; i < total_regs; i++)
323 sim_ppc_f0_regnum + i);
347 sim_ppc_vr0_regnum + i);
353 sim_ppc_vscr_regnum);
362 sim_ppc_rh0_regnum + i);
371 for (i = 0; i < sim_ppc_num_sprs; i++)
373 const char *spr_name = sim_spr_register_name (i);
376 if (spr_name != NULL)
418 const gdb_byte *regs,
size_t offset,
int regsize)
420 if (
regnum != -1 && offset != -1)
426 if (gdb_regsize < regsize
428 offset += regsize - gdb_regsize;
439 gdb_byte *regs,
size_t offset,
int regsize)
441 if (
regnum != -1 && offset != -1)
447 if (gdb_regsize < regsize)
451 memset (regs + offset, 0, regsize - gdb_regsize);
452 offset += regsize - gdb_regsize;
455 memset (regs + offset + regsize - gdb_regsize, 0,
456 regsize - gdb_regsize);
522 int regnum,
const void *gregs,
size_t len)
551 (
const gdb_byte *) gregs, offsets->
cr_offset,
554 (
const gdb_byte *) gregs, offsets->
xer_offset,
557 (
const gdb_byte *) gregs, offsets->
mq_offset,
572 int regnum,
const void *fpregs,
size_t len)
611 int regnum,
void *gregs,
size_t len)
662 int regnum,
void *fpregs,
size_t len)
696 int opcode = (insn >> 26) & 0x03f;
697 int sd = (insn >> 21) & 0x01f;
698 int a = (insn >> 16) & 0x01f;
699 int subcode = (insn >> 1) & 0x3ff;
707 if (opcode == 31 && subcode == 444 && a == 1)
709 if (opcode == 14 && sd == 1)
711 if (opcode == 58 && sd == 1)
720 if (opcode == 19 && subcode == 16)
722 if (opcode == 19 && subcode == 528)
752 CORE_ADDR scan_pc, func_start, func_end, epilogue_start, epilogue_end;
761 if (epilogue_start < func_start) epilogue_start = func_start;
764 if (epilogue_end > func_end) epilogue_end = func_end;
768 for (scan_pc = pc; scan_pc < epilogue_end; scan_pc +=
PPC_INSN_SIZE)
774 if (insn == 0x4e800020)
778 if (insn == 0x4e800420)
782 if (ctr > func_start && ctr < func_end)
794 scan_pc >= epilogue_start;
834#define OP_MASK 0xfc000000
835#define BP_MASK 0xFC0007FE
836#define B_INSN 0x48000000
837#define BC_INSN 0x40000000
838#define BXL_INSN 0x4c000000
839#define BP_INSN 0x7C000008
843#define LOAD_AND_RESERVE_MASK 0xfc0007fe
844#define LWARX_INSTRUCTION 0x7c000028
845#define LDARX_INSTRUCTION 0x7c0000A8
846#define LBARX_INSTRUCTION 0x7c000068
847#define LHARX_INSTRUCTION 0x7c0000e8
848#define LQARX_INSTRUCTION 0x7c000228
849#define STORE_CONDITIONAL_MASK 0xfc0007ff
850#define STWCX_INSTRUCTION 0x7c00012d
851#define STDCX_INSTRUCTION 0x7c0001ad
852#define STBCX_INSTRUCTION 0x7c00056d
853#define STHCX_INSTRUCTION 0x7c0005ad
854#define STQCX_INSTRUCTION 0x7c00016d
857#define ADDPCIS_INSN 0x4c000004
858#define ADDPCIS_INSN_MASK 0xfc00003e
859#define ADDPCIS_TARGET_REGISTER 0x03F00000
860#define ADDPCIS_INSN_REGSHIFT 21
862#define PNOP_MASK 0xfff3ffff
863#define PNOP_INSN 0x07000000
864#define R_MASK 0x00100000
865#define R_ZERO 0x00000000
869#define IS_LOAD_AND_RESERVE_INSN(insn) ((insn & LOAD_AND_RESERVE_MASK) == LWARX_INSTRUCTION \
870 || (insn & LOAD_AND_RESERVE_MASK) == LDARX_INSTRUCTION \
871 || (insn & LOAD_AND_RESERVE_MASK) == LBARX_INSTRUCTION \
872 || (insn & LOAD_AND_RESERVE_MASK) == LHARX_INSTRUCTION \
873 || (insn & LOAD_AND_RESERVE_MASK) == LQARX_INSTRUCTION)
876#define IS_STORE_CONDITIONAL_INSN(insn) ((insn & STORE_CONDITIONAL_MASK) == STWCX_INSTRUCTION \
877 || (insn & STORE_CONDITIONAL_MASK) == STDCX_INSTRUCTION \
878 || (insn & STORE_CONDITIONAL_MASK) == STBCX_INSTRUCTION \
879 || (insn & STORE_CONDITIONAL_MASK) == STHCX_INSTRUCTION \
880 || (insn & STORE_CONDITIONAL_MASK) == STQCX_INSTRUCTION)
883 ppc_displaced_step_copy_insn_closure;
889 CORE_ADDR from, CORE_ADDR to,
893 std::unique_ptr<ppc_displaced_step_copy_insn_closure> closure
894 (
new ppc_displaced_step_copy_insn_closure (len));
895 gdb_byte *buf = closure->buf.data ();
911 if ((insn &
OP_MASK) == 1 << 26)
953 CORE_ADDR from, CORE_ADDR to,
958 ppc_displaced_step_copy_insn_closure *closure
959 = (ppc_displaced_step_copy_insn_closure *) closure_;
969 if ((opcode) == 1 << 26)
980 LONGEST displaced_offset;
981 ULONGEST current_val;
983 displaced_offset = from - to;
991 + displaced_offset));
993 current_val + displaced_offset);
1001 ULONGEST current_pc;
1008 offset = current_pc - to;
1071 CORE_ADDR &displaced_pc)
1078 CORE_ADDR disp_step_buf_addr
1084 return per_inferior->
disp_step_buf->prepare (thread, displaced_pc);
1097 return per_inferior->
disp_step_buf->finish (arch, thread, sig);
1107 if (per_inferior ==
nullptr
1126std::vector<CORE_ADDR>
1132 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
1134 CORE_ADDR closing_insn;
1138 int last_breakpoint = 0;
1139 const int atomic_sequence_length = 16;
1140 int bc_insn_count = 0;
1148 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
1150 if ((insn &
OP_MASK) == 1 << 26)
1161 int immediate = ((insn & 0xfffc) ^ 0x8000) - 0x8000;
1162 int absolute = insn & 2;
1164 if (bc_insn_count >= 1)
1169 breaks[1] = immediate;
1171 breaks[1] =
loc + immediate;
1195 && (breaks[1] == breaks[0]
1196 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
1197 last_breakpoint = 0;
1199 std::vector<CORE_ADDR> next_pcs;
1201 for (index = 0; index <= last_breakpoint; index++)
1202 next_pcs.push_back (breaks[index]);
1208#define SIGNED_SHORT(x) \
1209 ((sizeof (short) == 2) \
1210 ? ((int)(short)(x)) \
1211 : ((int)((((x) & 0xffff) ^ 0x8000) - 0x8000)))
1213#define GET_SRC_REG(x) (((x) >> 21) & 0x1f)
1228 if ((op & 0xfc0007fe) == 0x7c000378)
1231 const int rx_regno = (op >> 16) & 31;
1235 if (rx_regno == 0 && ry_regno >= 3 && ry_regno <= 10)
1237 *r0_contains_arg = 1;
1246 if ((op & 0xfc1f0003) == 0xf8010000 ||
1247 (op & 0xfc1f0000) == 0xd8010000)
1252 return (rx_regno >= 3 && rx_regno <= 10);
1258 ((op & 0xfc1f0000) == 0x901f0000 ||
1259 (op & 0xfc1f0000) == 0x981f0000 ||
1260 (op & 0xfc1f0000) == 0xd81f0000))
1266 return ((rx_regno >= 3 && rx_regno <= 10)
1267 || (rx_regno == 0 && *r0_contains_arg));
1270 if ((op & 0xfc1f0000) == 0xfc010000)
1275 return (src_regno >= 2 && src_regno <= 8);
1278 if (framep && ((op & 0xfc1f0000) == 0xfc1f0000))
1283 return (src_regno >= 2 && src_regno <= 8);
1305 absolute = (int) ((insn >> 1) & 1);
1306 immediate = ((insn & ~3) << 6) >> 6;
1310 dest = pc + immediate;
1313 if ((dest_insn & 0xfc00ffff) == 0x4c000021)
1329 unsigned long ra,
bool with_update)
1335 ((op & 0xffff0003) == (rs | ra | 0xf8000000)) ||
1337 ((op & 0xffff0000) == (rs | ra | 0x90000000)))
1343 ((op & 0xffff0003) == (rs | ra | 0xf8000001)) ||
1345 ((op & 0xffff0000) == (rs | ra | 0x94000000)))
1362#define BL_MASK 0xfc000001
1363#define BL_INSTRUCTION 0x48000001
1364#define BL_DISPLACEMENT_MASK 0x03fffffc
1389 CORE_ADDR pc = start_pc;
1396 if ((op & 0xffff0000) == 0x90010000)
1398 while ((op & 0xffff0000) == 0x90010000)
1421 if ((op & 0xffff0000) != 0x39810000)
1427 if ((op & 0xffff0000) != 0x3c000000)
1433 if ((op & 0xffff0000) == 0x60000000)
1439 if (op != 0x7c0c0214)
1445 if (op != 0x7c0c0000)
1451 if ((op & 0xff9f0001) != 0x41820000)
1457 if ((op & 0xffff0000) != 0x398c0000)
1463 if (op != 0x900c0000)
1469 if ((op & 0xfc000001) != 0x48000000)
1475 if ((op & 0xffff0000) == 0x900c0000)
1504 if ((op & 0xffff0000) != 0x38010000)
1510 if ((op & 0xffff0000) != 0x3c010000)
1516 if ((op & 0xffff0000) != 0x30000000)
1523 if ((op & 0xffff0000) != 0x3d800000)
1529 if ((op & 0xffff0000) != 0x818c0000)
1535 if ((op & 0xfffffffe) != 0x7c406008)
1572 CORE_ADDR orig_pc = pc;
1573 CORE_ADDR last_prologue_pc = pc;
1574 CORE_ADDR li_found_pc = 0;
1578 long alloca_reg_offset = 0;
1579 long vr_saved_offset = 0;
1585 int vrsave_reg = -1;
1588 int minimal_toc_loaded = 0;
1589 int prev_insn_was_prologue_insn = 1;
1590 int num_skip_non_prologue_insns = 0;
1591 int r0_contains_arg = 0;
1616 if (prev_insn_was_prologue_insn)
1617 last_prologue_pc = pc;
1623 prev_insn_was_prologue_insn = 1;
1630 if ((op & 0xfc1fffff) == 0x7c0802a6)
1650 lr_reg = (op & 0x03e00000) >> 21;
1652 r0_contains_arg = 0;
1655 else if ((op & 0xfc1fffff) == 0x7c000026)
1657 cr_reg = (op & 0x03e00000) >> 21;
1659 r0_contains_arg = 0;
1663 else if ((op & 0xfc1f0000) == 0xd8010000)
1674 else if (((op & 0xfc1f0000) == 0xbc010000) ||
1675 (((op & 0xfc1f0000) == 0x90010000 ||
1676 (op & 0xfc1f0003) == 0xf8010000) &&
1677 (op & 0x03e00000) >= 0x01a00000))
1681 if ((op & 0xfc1f0000) == 0xbc010000)
1682 fdata->
gpr_mask |= ~((1U << reg) - 1);
1688 if ((op & 0xfc1f0003) == 0xf8010000)
1695 else if ((op & 0xffff0000) == 0x3c4c0000
1696 || (op & 0xffff0000) == 0x3c400000
1697 || (op & 0xffff0000) == 0x38420000)
1707 else if (op == 0x60000000)
1713 prev_insn_was_prologue_insn = 0;
1717 else if ((op & 0xffff0000) == 0x3c000000)
1719 fdata->
offset = (op & 0x0000ffff) << 16;
1721 r0_contains_arg = 0;
1725 else if ((op & 0xffff0000) == 0x60000000)
1727 fdata->
offset |= (op & 0x0000ffff);
1729 r0_contains_arg = 0;
1733 else if (lr_reg >= 0 &&
1749 if ((op & 0xfc000003) == 0xf8000000 ||
1750 (op & 0xfc000000) == 0x90000000)
1758 else if (cr_reg >= 0 &&
1765 if ((op & 0xfc000003) == 0xf8000000 ||
1766 (op & 0xfc000000) == 0x90000000)
1774 else if ((op & 0xfe80ffff) == 0x42800005 && lr_reg != -1)
1781 else if (op == 0x48000005)
1788 else if (op == 0x48000004)
1793 else if ((op & 0xffff0000) == 0x3fc00000 ||
1795 (op & 0xffff0000) == 0x3bde0000)
1800 else if ((op & 0xfc000001) == 0x48000001)
1819 if ((pc - orig_pc) > 8)
1824 if ((prologue_sal.
line == 0)
1825 || (prologue_sal.
line != this_sal.
line))
1836 if (op == 0x4def7b82 || op == 0)
1844 else if ((op & 0xfc1f0000) == 0x94010000)
1851 else if ((op & 0xfc1f07fa) == 0x7c01016a)
1858 else if ((op & 0xfc1f0003) == 0xf8010001)
1865 else if ((op & 0xffff0000) == 0x38210000)
1874 else if (((op >> 22) == 0x20f ||
1875 (op >> 22) == 0x3af)
1877 && !minimal_toc_loaded)
1879 minimal_toc_loaded = 1;
1885 else if ((op & 0xfc0007fe) == 0x7c000378 &&
1886 (((op >> 21) & 31) >= 3) &&
1887 (((op >> 21) & 31) <= 10) &&
1888 ((
long) ((op >> 16) & 31)
1902 else if (op == 0x603d0000)
1907 alloca_reg_offset = offset;
1912 else if (op == 0x603f0000
1913 || op == 0x7c3f0b78)
1918 alloca_reg_offset = offset;
1923 else if ((op & 0xfc1fffff) == 0x38010000)
1928 + ((op & ~0x38010000) >> 21));
1929 alloca_reg_offset = offset;
1940 else if ((op & 0xfc1fffff) == 0x7c0042a6)
1945 else if ((op & 0xfc1fffff) == 0x7c0043a6)
1953 else if ((op & 0xfc1f0000) == 0x90010000)
1964 else if (((op & 0xfc000000) == 0x64000000)
1965 || ((op & 0xfc000000) == 0x60000000))
1974 else if ((op & 0xffff0000) == 0x38000000
1975 || (op & 0xffff0000) == 0x39c00000)
1977 if ((op & 0xffff0000) == 0x38000000)
1978 r0_contains_arg = 0;
1985 prev_insn_was_prologue_insn = 0;
1989 else if ((op & 0xfc1fffff) == 0x7c1f01ce)
1991 if (
pc == (li_found_pc + 4))
2000 fdata->
vr_offset = vr_saved_offset + offset;
2002 vr_saved_offset = -1;
2013 else if (arch_info->mach == bfd_mach_ppc_e500
2014 && (op & 0xfc1f07ff) == 0x101f0321)
2016 if ((op & 0x03e00000) >= 0x01a00000)
2020 imm = (op >> 11) & 0x1f;
2021 ev_offset = imm * 8;
2035 else if (arch_info->mach == bfd_mach_ppc_e500
2036 && (op & 0xffe007ff) == 0x13e00320)
2038 if (
pc == (li_found_pc + 4))
2048 fdata->
ev_offset = vr_saved_offset + offset;
2050 vr_saved_offset = -1;
2058 else if (arch_info->mach == bfd_mach_ppc_e500
2059 && (op & 0xffe007ff) == 0x13e00321)
2064 ev_offset = ((op >> 11) & 0x1f) * 8;
2079 else if (arch_info->mach == bfd_mach_ppc_e500
2080 && (op & 0xfc1fffff) == 0x101f0320)
2082 if (
pc == (li_found_pc + 4))
2084 if ((op & 0x03e00000) >= 0x01a00000)
2095 fdata->
ev_offset = vr_saved_offset + offset;
2099 vr_saved_offset = -1;
2116 unsigned int all_mask = ~((1U << fdata->
saved_gpr) - 1);
2118 if ((fdata->
gpr_mask & all_mask) == all_mask)
2122 if (op == 0x4e800020
2123 || op == 0x4e800420)
2127 if ((op & 0xf4000000) == 0x40000000)
2133 if ((op & 0xffff0000) == 0x44000000)
2143 prev_insn_was_prologue_insn = 0;
2160 if ((op & 0xfc000001) == 0x48000001)
2164 if (op == 0x4def7b82)
2170 tmp = find_pc_misc_function (
pc);
2172 && strcmp (misc_function_vector[tmp].
name,
main_name ()) == 0)
2178 if (
pc == lim_pc && lr_reg >= 0)
2182 return last_prologue_pc;
2189 CORE_ADDR limit_pc, func_addr, func_end_addr = 0;
2196 CORE_ADDR post_prologue_pc
2198 if (post_prologue_pc != 0)
2199 return std::max (pc, post_prologue_pc);
2210 limit_pc = pc + 100;
2214 if (func_end_addr && limit_pc > func_end_addr)
2215 limit_pc = func_end_addr;
2243 CORE_ADDR call_dest = pc + 4 + displ;
2262 return (addr & -16);
2290 CORE_ADDR pc,
const char *
name)
2292 return name && startswith (
name,
"@FIX");
2315 unsigned int ii, op;
2317 CORE_ADDR solib_target_pc;
2320 static unsigned trampoline_code[] =
2340 if ((op & 0xfc000003) == 0x48000000)
2344 rel = ((int)(op << 6) >> 6);
2345 return pc + 8 + rel;
2351 if (solib_target_pc)
2352 return solib_target_pc;
2354 for (ii = 0; trampoline_code[ii]; ++ii)
2357 if (op != trampoline_code[ii])
2379 union __gdb_builtin_type_vec64
2383 int32_t v2_int32[2];
2384 int16_t v4_int16[4];
2392 "__ppc_builtin_type_vec64", TYPE_CODE_UNION);
2404 t->
set_name (
"ppc_builtin_type_vec64");
2436 struct type *t_float128
2442 "__ppc_builtin_type_vec128", TYPE_CODE_UNION);
2457 t->
set_name (
"ppc_builtin_type_vec128");
2494 static const char *
const spe_regnames[] = {
2495 "ev0",
"ev1",
"ev2",
"ev3",
"ev4",
"ev5",
"ev6",
"ev7",
2496 "ev8",
"ev9",
"ev10",
"ev11",
"ev12",
"ev13",
"ev14",
"ev15",
2497 "ev16",
"ev17",
"ev18",
"ev19",
"ev20",
"ev21",
"ev22",
"ev23",
2498 "ev24",
"ev25",
"ev26",
"ev27",
"ev28",
"ev29",
"ev30",
"ev31",
2506 static const char *
const dfp128_regnames[] = {
2507 "dl0",
"dl1",
"dl2",
"dl3",
2508 "dl4",
"dl5",
"dl6",
"dl7",
2509 "dl8",
"dl9",
"dl10",
"dl11",
2510 "dl12",
"dl13",
"dl14",
"dl15"
2518 static const char *
const vector_alias_regnames[] = {
2519 "v0",
"v1",
"v2",
"v3",
"v4",
"v5",
"v6",
"v7",
2520 "v8",
"v9",
"v10",
"v11",
"v12",
"v13",
"v14",
"v15",
2521 "v16",
"v17",
"v18",
"v19",
"v20",
"v21",
"v22",
"v23",
2522 "v24",
"v25",
"v26",
"v27",
"v28",
"v29",
"v30",
"v31"
2530 static const char *
const vsx_regnames[] = {
2531 "vs0",
"vs1",
"vs2",
"vs3",
"vs4",
"vs5",
"vs6",
"vs7",
2532 "vs8",
"vs9",
"vs10",
"vs11",
"vs12",
"vs13",
"vs14",
2533 "vs15",
"vs16",
"vs17",
"vs18",
"vs19",
"vs20",
"vs21",
2534 "vs22",
"vs23",
"vs24",
"vs25",
"vs26",
"vs27",
"vs28",
2535 "vs29",
"vs30",
"vs31",
"vs32",
"vs33",
"vs34",
"vs35",
2536 "vs36",
"vs37",
"vs38",
"vs39",
"vs40",
"vs41",
"vs42",
2537 "vs43",
"vs44",
"vs45",
"vs46",
"vs47",
"vs48",
"vs49",
2538 "vs50",
"vs51",
"vs52",
"vs53",
"vs54",
"vs55",
"vs56",
2539 "vs57",
"vs58",
"vs59",
"vs60",
"vs61",
"vs62",
"vs63"
2547 static const char *
const efpr_regnames[] = {
2548 "f32",
"f33",
"f34",
"f35",
"f36",
"f37",
"f38",
2549 "f39",
"f40",
"f41",
"f42",
"f43",
"f44",
"f45",
2550 "f46",
"f47",
"f48",
"f49",
"f50",
"f51",
2551 "f52",
"f53",
"f54",
"f55",
"f56",
"f57",
2552 "f58",
"f59",
"f60",
"f61",
"f62",
"f63"
2560 static const char *
const cdfp128_regnames[] = {
2561 "cdl0",
"cdl1",
"cdl2",
"cdl3",
2562 "cdl4",
"cdl5",
"cdl6",
"cdl7",
2563 "cdl8",
"cdl9",
"cdl10",
"cdl11",
2564 "cdl12",
"cdl13",
"cdl14",
"cdl15"
2572 static const char *
const cvsx_regnames[] = {
2573 "cvs0",
"cvs1",
"cvs2",
"cvs3",
"cvs4",
"cvs5",
"cvs6",
"cvs7",
2574 "cvs8",
"cvs9",
"cvs10",
"cvs11",
"cvs12",
"cvs13",
"cvs14",
2575 "cvs15",
"cvs16",
"cvs17",
"cvs18",
"cvs19",
"cvs20",
"cvs21",
2576 "cvs22",
"cvs23",
"cvs24",
"cvs25",
"cvs26",
"cvs27",
"cvs28",
2577 "cvs29",
"cvs30",
"cvs31",
"cvs32",
"cvs33",
"cvs34",
"cvs35",
2578 "cvs36",
"cvs37",
"cvs38",
"cvs39",
"cvs40",
"cvs41",
"cvs42",
2579 "cvs43",
"cvs44",
"cvs45",
"cvs46",
"cvs47",
"cvs48",
"cvs49",
2580 "cvs50",
"cvs51",
"cvs52",
"cvs53",
"cvs54",
"cvs55",
"cvs56",
2581 "cvs57",
"cvs58",
"cvs59",
"cvs60",
"cvs61",
"cvs62",
"cvs63"
2589 static const char *
const cefpr_regnames[] = {
2590 "cf32",
"cf33",
"cf34",
"cf35",
"cf36",
"cf37",
"cf38",
2591 "cf39",
"cf40",
"cf41",
"cf42",
"cf43",
"cf44",
"cf45",
2592 "cf46",
"cf47",
"cf48",
"cf49",
"cf50",
"cf51",
2593 "cf52",
"cf53",
"cf54",
"cf55",
"cf56",
"cf57",
2594 "cf58",
"cf59",
"cf60",
"cf61",
"cf62",
"cf63"
2631 internal_error (_(
"rs6000_pseudo_register_type: "
2632 "called on unexpected register '%s' (%d)"),
2676 int *optimizedp,
int *unavailablep)
2681 gdb_assert (
type->
code () == TYPE_CODE_FLT);
2684 gdb::make_array_view (from,
2687 optimizedp, unavailablep))
2692 *optimizedp = *unavailablep = 0;
2700 const gdb_byte *from)
2705 gdb_assert (
type->
code () == TYPE_CODE_FLT);
2741static enum register_status
2748 gdb_byte *byte_buffer = (gdb_byte *) buffer;
2749 enum register_status
status;
2774static enum register_status
2782static enum register_status
2784 int ev_reg, gdb_byte *buffer)
2789 enum register_status
status;
2817 int reg_nr,
const gdb_byte *buffer)
2820 reg_nr, (
void *) buffer);
2824static enum register_status
2826 int reg_nr, gdb_byte *buffer)
2830 enum register_status
status;
2866 int reg_nr,
const gdb_byte *buffer)
2900static enum register_status
2918 int reg_nr,
const gdb_byte *buffer)
2928static enum register_status
2930 int reg_nr, gdb_byte *buffer)
2933 int reg_index, vr0, fp0, vsr0_upper;
2934 enum register_status
status;
2978 int reg_nr,
const gdb_byte *buffer)
2981 int reg_index, vr0, fp0, vsr0_upper;
3018static enum register_status
3020 int reg_nr, gdb_byte *buffer)
3049 int reg_nr,
const gdb_byte *buffer)
3072 error (_(
"Cannot write to the checkpointed EFP register, "
3073 "the corresponding vector register is unavailable."));
3081static enum register_status
3084 int reg_nr, gdb_byte *buffer)
3089 gdb_assert (regcache_arch ==
gdbarch);
3106 internal_error (_(
"rs6000_pseudo_register_read: "
3107 "called on unexpected register '%s' (%d)"),
3114 int reg_nr,
const gdb_byte *buffer)
3119 gdb_assert (regcache_arch ==
gdbarch);
3135 internal_error (_(
"rs6000_pseudo_register_write: "
3136 "called on unexpected register '%s' (%d)"),
3189 int reg_index, vr0, fp0, vsr0_upper;
3276 internal_error (_(
"rs6000_pseudo_register_collect: "
3277 "called on unexpected register '%s' (%d)"),
3301 if (0 <= num && num <= 31)
3303 else if (32 <= num && num <= 63)
3308 else if (77 <= num && num <= 108)
3310 else if (1200 <= num && num < 1200 + 32)
3343 if (0 <= num && num <= 31)
3345 else if (32 <= num && num <= 63)
3350 else if (1124 <= num && num < 1124 + 32)
3352 else if (1200 <= num && num < 1200 + 32)
3415 if (0 <= num && num <= 63)
3417 else if (68 <= num && num <= 75)
3418 return num - 68 + 86;
3419 else if (77 <= num && num <= 108)
3420 return num - 77 + 1124;
3470 {
"powerpc",
"PowerPC user-level", bfd_arch_powerpc,
3472 {
"power",
"POWER user-level", bfd_arch_rs6000,
3474 {
"403",
"IBM PowerPC 403", bfd_arch_powerpc,
3476 {
"405",
"IBM PowerPC 405", bfd_arch_powerpc,
3478 {
"601",
"Motorola PowerPC 601", bfd_arch_powerpc,
3480 {
"602",
"Motorola PowerPC 602", bfd_arch_powerpc,
3482 {
"603",
"Motorola/IBM PowerPC 603 or 603e", bfd_arch_powerpc,
3484 {
"604",
"Motorola PowerPC 604 or 604e", bfd_arch_powerpc,
3486 {
"403GC",
"IBM PowerPC 403GC", bfd_arch_powerpc,
3488 {
"505",
"Motorola PowerPC 505", bfd_arch_powerpc,
3490 {
"860",
"Motorola PowerPC 860 or 850", bfd_arch_powerpc,
3492 {
"750",
"Motorola/IBM PowerPC 750 or 740", bfd_arch_powerpc,
3494 {
"7400",
"Motorola/IBM PowerPC 7400 (G4)", bfd_arch_powerpc,
3496 {
"e500",
"Motorola PowerPC e500", bfd_arch_powerpc,
3500 {
"powerpc64",
"PowerPC 64-bit user-level", bfd_arch_powerpc,
3502 {
"620",
"Motorola PowerPC 620", bfd_arch_powerpc,
3504 {
"630",
"Motorola PowerPC 630", bfd_arch_powerpc,
3506 {
"a35",
"PowerPC A35", bfd_arch_powerpc,
3508 {
"rs64ii",
"PowerPC rs64ii", bfd_arch_powerpc,
3510 {
"rs64iii",
"PowerPC rs64iii", bfd_arch_powerpc,
3514 {
"rs1",
"IBM POWER RS1", bfd_arch_rs6000,
3516 {
"rsc",
"IBM POWER RSC", bfd_arch_rs6000,
3518 {
"rs2",
"IBM POWER RS2", bfd_arch_rs6000,
3521 {0, 0, (
enum bfd_architecture) 0, 0, 0}
3564 CORE_ADDR
func = 0, pc = 0;
3566 if ((*this_cache) != NULL)
3569 (*this_cache) = cache;
3590 catch (
const gdb_exception_error &ex)
3592 if (ex.error != NOT_AVAILABLE_ERROR)
3612 if (
func == 0 && saved_lr == pc)
3617 if (
func == saved_func)
3634 byte_order, &backchain))
3635 cache->
base = (CORE_ADDR) backchain;
3672 gpr_addr += wordsize;
3684 for (i = fdata.
saved_vr; i < 32; i++)
3700 CORE_ADDR off = (byte_order == BFD_ENDIAN_BIG ? 4 : 0);
3762 if (info->base == 0)
3768static struct value *
3770 void **this_cache,
int regnum)
3802 (*this_cache) = cache;
3819 catch (
const gdb_exception_error &ex)
3821 if (ex.error != NOT_AVAILABLE_ERROR)
3833 void **this_cache,
struct frame_id *this_id)
3840 if (info->base == 0)
3849static struct value *
3851 void **this_cache,
int regnum)
3864 void **this_prologue_cache)
3893 return info->initial_sp;
3924 && regnum <= tdep->ppc_gp0_regnum + 31)
3930 && regnum <= tdep->ppc_gp0_regnum + 12)
3939 && regnum <= tdep->ppc_fp0_regnum + 31))
3944 && regnum <= tdep->ppc_fp0_regnum + 13))
3953 && regnum <= tdep->ppc_vr0_regnum + 31)
3959 && regnum <= tdep->ppc_vr0_regnum + 19))
3981 gdb_byte *contents = NULL;
3993 int vector_abi = bfd_elf_get_obj_attr_int (abfd, OBJ_ATTR_GNU,
3994 Tag_GNU_Power_ABI_Vector);
3995 if (vector_abi == 3)
3999 sect = bfd_get_section_by_name (abfd,
".PPC.EMB.apuinfo");
4003 size = bfd_section_size (sect);
4005 if (!bfd_get_section_contents (abfd, sect, contents, 0,
size))
4032 unsigned int name_len;
4033 unsigned int data_len;
4040 name_len = bfd_get_32 (abfd, ptr);
4041 name_len = (name_len + 3) & ~3U;
4042 data_len = bfd_get_32 (abfd, ptr + 4);
4043 type = bfd_get_32 (abfd, ptr + 8);
4048 && strcmp ((
const char *) ptr,
"APUinfo") != 0)
4067 unsigned int apuinfo = bfd_get_32 (abfd, ptr);
4068 unsigned int apu = apuinfo >> 16;
4074 if (apu == 0x100 || apu == 0x101)
4091#define PPC_FIELD(value, from, len) \
4092 (((value) >> (32 - (from) - (len))) & ((1 << (len)) - 1))
4093#define PPC_SEXT(v, bs) \
4094 ((((CORE_ADDR) (v) & (((CORE_ADDR) 1 << (bs)) - 1)) \
4095 ^ ((CORE_ADDR) 1 << ((bs) - 1))) \
4096 - ((CORE_ADDR) 1 << ((bs) - 1)))
4097#define PPC_OP6(insn) PPC_FIELD (insn, 0, 6)
4098#define PPC_EXTOP(insn) PPC_FIELD (insn, 21, 10)
4099#define PPC_RT(insn) PPC_FIELD (insn, 6, 5)
4100#define PPC_RS(insn) PPC_FIELD (insn, 6, 5)
4101#define PPC_RA(insn) PPC_FIELD (insn, 11, 5)
4102#define PPC_RB(insn) PPC_FIELD (insn, 16, 5)
4103#define PPC_NB(insn) PPC_FIELD (insn, 16, 5)
4104#define PPC_VRT(insn) PPC_FIELD (insn, 6, 5)
4105#define PPC_FRT(insn) PPC_FIELD (insn, 6, 5)
4106#define PPC_SPR(insn) (PPC_FIELD (insn, 11, 5) \
4107 | (PPC_FIELD (insn, 16, 5) << 5))
4108#define PPC_BO(insn) PPC_FIELD (insn, 6, 5)
4109#define PPC_T(insn) PPC_FIELD (insn, 6, 5)
4110#define PPC_D(insn) PPC_SEXT (PPC_FIELD (insn, 16, 16), 16)
4111#define PPC_DS(insn) PPC_SEXT (PPC_FIELD (insn, 16, 14), 14)
4112#define PPC_DQ(insn) PPC_SEXT (PPC_FIELD (insn, 16, 12), 12)
4113#define PPC_BIT(insn,n) ((insn & (1 << (31 - (n)))) ? 1 : 0)
4114#define PPC_OE(insn) PPC_BIT (insn, 21)
4115#define PPC_RC(insn) PPC_BIT (insn, 31)
4116#define PPC_Rc(insn) PPC_BIT (insn, 21)
4117#define PPC_LK(insn) PPC_BIT (insn, 31)
4118#define PPC_TX(insn) PPC_BIT (insn, 31)
4119#define PPC_LEV(insn) PPC_FIELD (insn, 20, 7)
4121#define PPC_XT(insn) ((PPC_TX (insn) << 5) | PPC_T (insn))
4122#define PPC_XTp(insn) ((PPC_BIT (insn, 10) << 5) \
4123 | PPC_FIELD (insn, 6, 4) << 1)
4124#define PPC_XSp(insn) ((PPC_BIT (insn, 10) << 5) \
4125 | PPC_FIELD (insn, 6, 4) << 1)
4126#define PPC_XER_NB(xer) (xer & 0x7f)
4129#define P_PPC_D(insn_prefix, insn_suffix) \
4130 PPC_SEXT (PPC_FIELD (insn_prefix, 14, 18) << 16 \
4131 | PPC_FIELD (insn_suffix, 16, 16), 34)
4132#define P_PPC_TX5(insn_sufix) PPC_BIT (insn_suffix, 5)
4133#define P_PPC_TX15(insn_suffix) PPC_BIT (insn_suffix, 15)
4134#define P_PPC_XT(insn_suffix) ((PPC_TX (insn_suffix) << 5) \
4135 | PPC_T (insn_suffix))
4136#define P_PPC_XT5(insn_suffix) ((P_PPC_TX5 (insn_suffix) << 5) \
4137 | PPC_T (insn_suffix))
4138#define P_PPC_XT15(insn_suffix) \
4139 ((P_PPC_TX15 (insn_suffix) << 5) | PPC_T (insn_suffix))
4148 if (vsr < 0 || vsr >= 64)
4176 int entry,
bool save_fpscr)
4179 if (entry < 0 || entry >= 8)
4206 for (i = 0; i < 4; i++)
4226 CORE_ADDR addr, uint32_t insn)
4294 switch ((ext & 0x1ff))
4328 switch (ext & 0x3ff)
4768 CORE_ADDR addr, uint32_t insn)
4784 ea +=
PPC_DQ (insn) << 4;
4796 CORE_ADDR addr, uint32_t insn)
4801 switch (ext & 0x01f)
4825 if ((
PPC_BO (insn) & 0x4) == 0)
4852 int RA_opcode =
PPC_RA(insn);
4872 CORE_ADDR addr, uint32_t insn)
4876 int tmp, nr, nb = 0, i;
4877 CORE_ADDR at_dcsz, ea = 0;
4878 ULONGEST rb, ra, xer;
4882 switch (ext & 0x1ff)
4930 if ((ext & 0x1f) == 15)
4938 if ((ext & 0xff) == 170)
5077 for (i = 0; i < nr; i++)
5080 + ((
PPC_RT (insn) + i) & 0x1f));
5234 if (ext == 694 || ext == 726 || ext == 150 || ext == 214 || ext == 182)
5353 nb = (rb & 0xff) > 16 ? 16 : (rb & 0xff);
5512 ea = (ra + rb) & ~((ULONGEST) (at_dcsz - 1));
5532 CORE_ADDR addr, uint32_t insn)
5702 CORE_ADDR addr, uint32_t insn)
5705 int RA_opcode =
PPC_RA(insn);
5743 CORE_ADDR addr, uint32_t insn)
5860 switch ((ext >> 2) & 0x7f)
6082 if (((ext >> 3) & 0x3) == 3)
6098 CORE_ADDR addr, uint32_t insn)
6113 ea +=
PPC_DS (insn) << 2;
6142 ea +=
PPC_DQ (insn) << 4;
6157 CORE_ADDR addr, uint32_t insn)
6454 uint32_t insn_prefix, uint32_t insn_suffix)
6458 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6486 uint32_t insn_prefix, uint32_t insn_suffix)
6488 int opcode =
PPC_FIELD (insn_suffix, 21, 8);
6490 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6611 CORE_ADDR addr, uint32_t insn_prefix,
6612 uint32_t insn_suffix)
6618 int op6 =
PPC_OP6 (insn_suffix);
6622 if (
PPC_RA (insn_suffix) != 0)
6624 +
PPC_RA (insn_suffix), &iaddr);
6653 iaddr +=
P_PPC_D (insn_prefix, insn_suffix);
6665 uint32_t insn_prefix, uint32_t insn_suffix)
6668 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6669 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6720 uint32_t insn_prefix, uint32_t insn_suffix)
6723 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6757 uint32_t insn_prefix, uint32_t insn_suffix)
6760 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6761 int ST4 =
PPC_FIELD (insn_prefix, 8, 4);
6805 uint32_t insn_prefix,
6806 uint32_t insn_suffix)
6813 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6815 if ((
type == 0) && (ST1 == 0))
6819 if (
PPC_RA (insn_suffix) != 0)
6830 ea +=
P_PPC_D (insn_prefix, insn_suffix);
6858 uint32_t insn_prefix,
6859 uint32_t insn_suffix)
6866 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6868 if ((
type == 0) && (ST1 == 0))
6880 if (
PPC_RA (insn_suffix) != 0)
6891 ea +=
P_PPC_D (insn_prefix, insn_suffix);
6917 int ST1 =
PPC_FIELD (insn_prefix, 8, 1);
6923 insn_prefix, insn_suffix) == 0)
6931 if ((
type == 2) && (ST1 == 0))
6936 goto UNKNOWN_PREFIX_OP;
6941 insn_prefix, insn_suffix) != 0)
6942 goto UNKNOWN_PREFIX_OP;
6947 insn_prefix, insn_suffix) != 0)
6948 goto UNKNOWN_PREFIX_OP;
6953 insn_prefix, insn_suffix) != 0)
6954 goto UNKNOWN_PREFIX_OP;
6957 if ((
type == 2) && (ST1 == 0))
6962 goto UNKNOWN_PREFIX_OP;
6975 insn_prefix, insn_suffix) != 0)
6976 goto UNKNOWN_PREFIX_OP;
6981 insn_prefix, insn_suffix) != 0)
6982 goto UNKNOWN_PREFIX_OP;
6986 if ((
type == 0) && (ST1 == 0))
6989 goto UNKNOWN_PREFIX_OP;
6995 insn_prefix, insn_suffix) != 0)
6996 goto UNKNOWN_PREFIX_OP;
7001 if ((
type == 0) && (ST1 == 0))
7009 goto UNKNOWN_PREFIX_OP;
7015 if ((
type == 0) && (ST1 == 0))
7020 goto UNKNOWN_PREFIX_OP;
7025 if ((
type == 2) && (ST1 == 0))
7030 goto UNKNOWN_PREFIX_OP;
7034 if ((
type == 0) && (ST1 == 0))
7040 goto UNKNOWN_PREFIX_OP;
7046 goto UNKNOWN_PREFIX_OP;
7050 if ((
type == 0) && (ST1 == 0))
7057 if (
PPC_RA (insn_suffix) != 0)
7060 +
PPC_RA (insn_suffix), &ea);
7067 ea +=
P_PPC_D (insn_prefix, insn_suffix) << 4;
7071 goto UNKNOWN_PREFIX_OP;
7077 "Warning: Don't know how to record prefix instruction "
7078 "%08x %08x at %s, %d.\n",
7099 uint32_t insn, insn_suffix;
7174 if ((
PPC_BO (insn) & 0x4) == 0)
7235 for (i =
PPC_RT (insn); i < 32; i++)
7265 iaddr +=
PPC_D (insn);
7291 iaddr +=
PPC_D (insn);
7293 if (op6 == 36 || op6 == 37 || op6 == 52 || op6 == 53)
7295 else if (op6 == 54 || op6 == 55)
7297 else if (op6 == 44 || op6 == 45)
7299 else if (op6 == 38 || op6 == 39)
7369 size = (sub2 == 2) ? 16 : 8;
7371 iaddr +=
PPC_DS (insn) << 2;
7374 if (op6 == 62 && sub2 == 1)
7445 scoped_restore restore_memory
7475 int wordsize, from_xcoff_exec, from_elf_exec;
7476 enum bfd_architecture arch;
7484 int have_fpu = 0, have_spe = 0, have_mq = 0, have_altivec = 0;
7485 int have_dfp = 0, have_vsx = 0, have_ppr = 0, have_dscr = 0;
7486 int have_tar = 0, have_ebb = 0, have_pmu = 0, have_htm_spr = 0;
7487 int have_htm_core = 0, have_htm_fpu = 0, have_htm_altivec = 0;
7488 int have_htm_vsx = 0, have_htm_ppr = 0, have_htm_dscr = 0;
7489 int have_htm_tar = 0;
7490 int tdesc_wordsize = -1;
7491 const struct target_desc *tdesc = info.target_desc;
7493 int num_pseudoregs = 0;
7496 from_xcoff_exec = info.abfd && info.abfd->format == bfd_object &&
7497 bfd_get_flavour (info.abfd) == bfd_target_xcoff_flavour;
7499 from_elf_exec = info.abfd && info.abfd->format == bfd_object &&
7500 bfd_get_flavour (info.abfd) == bfd_target_elf_flavour;
7504 if (from_xcoff_exec)
7506 if (bfd_xcoff_is_xcoff64 (info.abfd))
7511 else if (from_elf_exec)
7513 if (elf_elfheader (info.abfd)->e_ident[EI_CLASS] == ELFCLASS64)
7522 if (info.bfd_arch_info != NULL && info.bfd_arch_info->bits_per_word != 0)
7523 wordsize = (info.bfd_arch_info->bits_per_word
7524 / info.bfd_arch_info->bits_per_byte);
7530 arch = info.bfd_arch_info->arch;
7531 mach = info.bfd_arch_info->mach;
7543 arch = info.bfd_arch_info->arch;
7544 mach = bfd_mach_ppc_e500;
7545 bfd_default_set_arch_mach (&abfd,
arch, mach);
7546 info.bfd_arch_info = bfd_get_arch_info (&abfd);
7568 static const char *
const gprs[] = {
7569 "r0",
"r1",
"r2",
"r3",
"r4",
"r5",
"r6",
"r7",
7570 "r8",
"r9",
"r10",
"r11",
"r12",
"r13",
"r14",
"r15",
7571 "r16",
"r17",
"r18",
"r19",
"r20",
"r21",
"r22",
"r23",
7572 "r24",
"r25",
"r26",
"r27",
"r28",
"r29",
"r30",
"r31"
7574 const struct tdesc_feature *feature;
7576 static const char *
const msr_names[] = {
"msr",
"ps" };
7577 static const char *
const cr_names[] = {
"cr",
"cnd" };
7578 static const char *
const ctr_names[] = {
"ctr",
"cnt" };
7581 "org.gnu.gdb.power.core");
7582 if (feature == NULL)
7615 wordsize = tdesc_wordsize;
7618 "org.gnu.gdb.power.fpu");
7619 if (feature != NULL)
7621 static const char *
const fprs[] = {
7622 "f0",
"f1",
"f2",
"f3",
"f4",
"f5",
"f6",
"f7",
7623 "f8",
"f9",
"f10",
"f11",
"f12",
"f13",
"f14",
"f15",
7624 "f16",
"f17",
"f18",
"f19",
"f20",
"f21",
"f22",
"f23",
7625 "f24",
"f25",
"f26",
"f27",
"f28",
"f29",
"f30",
"f31"
7648 "org.gnu.gdb.power.altivec");
7649 if (feature != NULL)
7651 static const char *
const vector_regs[] = {
7652 "vr0",
"vr1",
"vr2",
"vr3",
"vr4",
"vr5",
"vr6",
"vr7",
7653 "vr8",
"vr9",
"vr10",
"vr11",
"vr12",
"vr13",
"vr14",
"vr15",
7654 "vr16",
"vr17",
"vr18",
"vr19",
"vr20",
"vr21",
"vr22",
"vr23",
7655 "vr24",
"vr25",
"vr26",
"vr27",
"vr28",
"vr29",
"vr30",
"vr31"
7668 if (have_spe || !valid_p)
7677 "org.gnu.gdb.power.vsx");
7679 if (feature != NULL)
7681 static const char *
const vsx_regs[] = {
7682 "vs0h",
"vs1h",
"vs2h",
"vs3h",
"vs4h",
"vs5h",
7683 "vs6h",
"vs7h",
"vs8h",
"vs9h",
"vs10h",
"vs11h",
7684 "vs12h",
"vs13h",
"vs14h",
"vs15h",
"vs16h",
"vs17h",
7685 "vs18h",
"vs19h",
"vs20h",
"vs21h",
"vs22h",
"vs23h",
7686 "vs24h",
"vs25h",
"vs26h",
"vs27h",
"vs28h",
"vs29h",
7697 if (!valid_p || !have_fpu || !have_altivec)
7719 "org.gnu.gdb.power.spe");
7720 if (feature != NULL)
7722 static const char *
const upper_spe[] = {
7723 "ev0h",
"ev1h",
"ev2h",
"ev3h",
7724 "ev4h",
"ev5h",
"ev6h",
"ev7h",
7725 "ev8h",
"ev9h",
"ev10h",
"ev11h",
7726 "ev12h",
"ev13h",
"ev14h",
"ev15h",
7727 "ev16h",
"ev17h",
"ev18h",
"ev19h",
7728 "ev20h",
"ev21h",
"ev22h",
"ev23h",
7729 "ev24h",
"ev25h",
"ev26h",
"ev27h",
7730 "ev28h",
"ev29h",
"ev30h",
"ev31h"
7743 if (have_mq || have_fpu || !valid_p)
7752 "org.gnu.gdb.power.ppr");
7753 if (feature != NULL)
7768 "org.gnu.gdb.power.dscr");
7769 if (feature != NULL)
7784 "org.gnu.gdb.power.tar");
7785 if (feature != NULL)
7800 "org.gnu.gdb.power.ebb");
7801 if (feature != NULL)
7803 static const char *
const ebb_regs[] = {
7804 "bescr",
"ebbhr",
"ebbrr"
7808 for (i = 0; i < ARRAY_SIZE (ebb_regs); i++)
7822 "org.gnu.gdb.power.linux.pmu");
7823 if (feature != NULL)
7852 "org.gnu.gdb.power.htm.spr");
7853 if (feature != NULL)
7855 static const char *
const tm_spr_regs[] = {
7856 "tfhar",
"texasr",
"tfiar"
7860 for (i = 0; i < ARRAY_SIZE (tm_spr_regs); i++)
7873 "org.gnu.gdb.power.htm.core");
7874 if (feature != NULL)
7876 static const char *
const cgprs[] = {
7877 "cr0",
"cr1",
"cr2",
"cr3",
"cr4",
"cr5",
"cr6",
"cr7",
7878 "cr8",
"cr9",
"cr10",
"cr11",
"cr12",
"cr13",
"cr14",
7879 "cr15",
"cr16",
"cr17",
"cr18",
"cr19",
"cr20",
"cr21",
7880 "cr22",
"cr23",
"cr24",
"cr25",
"cr26",
"cr27",
"cr28",
7881 "cr29",
"cr30",
"cr31",
"ccr",
"cxer",
"clr",
"cctr"
7886 for (i = 0; i < ARRAY_SIZE (cgprs); i++)
7899 "org.gnu.gdb.power.htm.fpu");
7900 if (feature != NULL)
7904 static const char *
const cfprs[] = {
7905 "cf0",
"cf1",
"cf2",
"cf3",
"cf4",
"cf5",
"cf6",
"cf7",
7906 "cf8",
"cf9",
"cf10",
"cf11",
"cf12",
"cf13",
"cf14",
"cf15",
7907 "cf16",
"cf17",
"cf18",
"cf19",
"cf20",
"cf21",
"cf22",
7908 "cf23",
"cf24",
"cf25",
"cf26",
"cf27",
"cf28",
"cf29",
7909 "cf30",
"cf31",
"cfpscr"
7912 for (i = 0; i < ARRAY_SIZE (cfprs); i++)
7925 "org.gnu.gdb.power.htm.altivec");
7926 if (feature != NULL)
7930 static const char *
const cvmx[] = {
7931 "cvr0",
"cvr1",
"cvr2",
"cvr3",
"cvr4",
"cvr5",
"cvr6",
7932 "cvr7",
"cvr8",
"cvr9",
"cvr10",
"cvr11",
"cvr12",
"cvr13",
7933 "cvr14",
"cvr15",
"cvr16",
"cvr17",
"cvr18",
"cvr19",
"cvr20",
7934 "cvr21",
"cvr22",
"cvr23",
"cvr24",
"cvr25",
"cvr26",
7935 "cvr27",
"cvr28",
"cvr29",
"cvr30",
"cvr31",
"cvscr",
7939 for (i = 0; i < ARRAY_SIZE (cvmx); i++)
7946 have_htm_altivec = 1;
7949 have_htm_altivec = 0;
7952 "org.gnu.gdb.power.htm.vsx");
7953 if (feature != NULL)
7957 static const char *
const cvsx[] = {
7958 "cvs0h",
"cvs1h",
"cvs2h",
"cvs3h",
"cvs4h",
"cvs5h",
7959 "cvs6h",
"cvs7h",
"cvs8h",
"cvs9h",
"cvs10h",
"cvs11h",
7960 "cvs12h",
"cvs13h",
"cvs14h",
"cvs15h",
"cvs16h",
"cvs17h",
7961 "cvs18h",
"cvs19h",
"cvs20h",
"cvs21h",
"cvs22h",
"cvs23h",
7962 "cvs24h",
"cvs25h",
"cvs26h",
"cvs27h",
"cvs28h",
"cvs29h",
7966 for (i = 0; i < ARRAY_SIZE (cvsx); i++)
7972 if (!valid_p || !have_htm_fpu || !have_htm_altivec)
7980 "org.gnu.gdb.power.htm.ppr");
7981 if (feature != NULL)
7994 "org.gnu.gdb.power.htm.dscr");
7995 if (feature != NULL)
8008 "org.gnu.gdb.power.htm.tar");
8009 if (feature != NULL)
8033 if (tdesc_wordsize != -1 && tdesc_wordsize != wordsize)
8039 switch (elf_elfheader (info.abfd)->e_flags & EF_PPC64_ABI)
8054 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8055 Tag_GNU_Power_ABI_FP) & 3)
8070 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8071 Tag_GNU_Power_ABI_FP) >> 2)
8086 switch (bfd_elf_get_obj_attr_int (info.abfd, OBJ_ATTR_GNU,
8087 Tag_GNU_Power_ABI_Vector))
8113 if (wordsize == 8 && info.byte_order == BFD_ENDIAN_LITTLE)
8124 soft_float = !have_fpu;
8129 if (!soft_float && !have_fpu)
8161 = gdbarch_tdep<ppc_gdbarch_tdep> (
arches->gdbarch);
8162 if (tdep && tdep->elf_abi != elf_abi)
8166 if (tdep && tdep->long_double_abi != long_double_abi)
8168 if (tdep && tdep->vector_abi != vector_abi)
8170 if (tdep && tdep->
wordsize == wordsize)
8184 tdep->elf_abi = elf_abi;
8186 tdep->long_double_abi = long_double_abi;
8187 tdep->vector_abi = vector_abi;
8260 if (have_spe || have_dfp || have_altivec
8261 || have_vsx || have_htm_fpu || have_htm_vsx)
8277 num_pseudoregs += 32;
8279 num_pseudoregs += 16;
8281 num_pseudoregs += 32;
8284 num_pseudoregs += 96;
8286 num_pseudoregs += 16;
8289 num_pseudoregs += 64 + 32;
8317 else if (wordsize == 8)
8327 rs6000_breakpoint::kind_from_pc);
8329 rs6000_breakpoint::bp_from_kind);
8360 ppc_displaced_step_copy_insn);
8372 info.target_desc = tdesc;
8452 if (mach == bfd_mach_ppc_e500)
8459 disassembler_options_powerpc ());
8483 internal_error (_(
"could not update architecture"));
8503 internal_error (_(
"Invalid vector ABI accepted: %s."),
8509 internal_error (_(
"could not update architecture"));
8549 unsigned int *insns)
8554 for (i = 0, insn = 0; pattern[i].
mask; i++)
8559 if ((insn & pattern[i].mask) == pattern[i].data)
8565 else if (!pattern[i].optional)
8578 return ((((CORE_ADDR) insn & 0xffff) ^ 0x8000) - 0x8000);
8588 return ((((CORE_ADDR) insn & 0xfffc) ^ 0x8000) - 0x8000);
8595 return (CORE_ADDR) ((((insn1 & 0x3ffff) ^ 0x20000) - 0x20000) << 16)
8596 | (CORE_ADDR)(insn2 & 0xffff);
8632 _(
"Various PowerPC-specific commands."),
8633 _(
"Various PowerPC-specific commands."),
8640 _(
"Set whether to use a soft-float ABI."),
8641 _(
"Show whether to use a soft-float ABI."),
8648 _(
"Set the vector ABI."),
8649 _(
"Show the vector ABI."),
8656Set whether to use just one debug register for watchpoints on scalars."),
8658Show whether to use just one debug register for watchpoints on scalars."),
8660If true, GDB will use only one debug register when watching a variable of\n\
8661scalar type, thus assuming that the variable is accessed through the address\n\
8662of its first byte."),
int gdbarch_update_p(struct gdbarch_info info)
CORE_ADDR displaced_step_at_entry_point(struct gdbarch *gdbarch)
static std::vector< const char * > arches
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
#define BP_MANIPULATION_ENDIAN(BREAK_INSN_LITTLE, BREAK_INSN_BIG)
int target_auxv_search(const gdb::byte_vector &auxv, target_ops *ops, gdbarch *gdbarch, CORE_ADDR match, CORE_ADDR *valp)
void ax_reg_mask(struct agent_expr *ax, int reg)
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
bool target_exact_watchpoints
enum register_status raw_read(int regnum, gdb_byte *buf)
enum register_status raw_read_part(int regnum, int offset, int len, gdb_byte *buf)
void raw_collect(int regnum, void *buf) const override
void raw_supply(int regnum, const void *buf) override
enum register_status get_register_status(int regnum) const override
void raw_write_part(int regnum, int offset, int len, const gdb_byte *buf)
void raw_write(int regnum, const gdb_byte *buf)
void raw_update(int regnum) override
struct cmd_list_element * showlist
struct cmd_list_element * setlist
set_show_commands add_setshow_enum_cmd(const char *name, enum command_class theclass, const char *const *enumlist, const char **var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_prefix_cmd(const char *name, command_class theclass, const char *set_doc, const char *show_doc, cmd_list_element **set_subcommands_list, cmd_list_element **show_subcommands_list, cmd_list_element **set_list, cmd_list_element **show_list)
set_show_commands add_setshow_boolean_cmd(const char *name, enum command_class theclass, bool *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
set_show_commands add_setshow_auto_boolean_cmd(const char *name, enum command_class theclass, enum auto_boolean *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
ULONGEST read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
LONGEST read_memory_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order)
int safe_read_memory_unsigned_integer(CORE_ADDR memaddr, int len, enum bfd_endian byte_order, ULONGEST *return_value)
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
static LONGEST extract_signed_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
#define displaced_debug_printf(fmt,...)
displaced_step_prepare_status
std::unique_ptr< displaced_step_copy_insn_closure > displaced_step_copy_insn_closure_up
displaced_step_finish_status
void dwarf2_frame_set_adjust_regnum(struct gdbarch *gdbarch, int(*adjust_regnum)(struct gdbarch *, int, int))
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
void dwarf2_frame_set_init_reg(struct gdbarch *gdbarch, void(*init_reg)(struct gdbarch *, int, struct dwarf2_frame_state_reg *, frame_info_ptr))
@ DWARF2_FRAME_REG_SAME_VALUE
@ DWARF2_FRAME_REG_UNDEFINED
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
int frame_relative_level(frame_info_ptr fi)
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
CORE_ADDR get_frame_pc(frame_info_ptr frame)
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
struct frame_id frame_id_build_unavailable_stack(CORE_ADDR code_addr)
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
bool get_frame_register_bytes(frame_info_ptr frame, int regnum, CORE_ADDR offset, gdb::array_view< gdb_byte > buffer, int *optimizedp, int *unavailablep)
frame_info_ptr get_current_frame(void)
bool safe_frame_unwind_memory(frame_info_ptr this_frame, CORE_ADDR addr, gdb::array_view< gdb_byte > buffer)
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
#define FRAME_OBSTACK_ZALLOC(TYPE)
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
void set_gdbarch_stab_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_stab_reg_to_regnum_ftype *stab_reg_to_regnum)
int gdbarch_pc_regnum(struct gdbarch *gdbarch)
void set_gdbarch_char_signed(struct gdbarch *gdbarch, int char_signed)
void set_gdbarch_fetch_pointer_argument(struct gdbarch *gdbarch, gdbarch_fetch_pointer_argument_ftype *fetch_pointer_argument)
void set_gdbarch_ps_regnum(struct gdbarch *gdbarch, int ps_regnum)
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
void set_gdbarch_disassembler_options(struct gdbarch *gdbarch, char **disassembler_options)
void set_gdbarch_gen_return_address(struct gdbarch *gdbarch, gdbarch_gen_return_address_ftype *gen_return_address)
void set_gdbarch_displaced_step_restore_all_in_ptid(struct gdbarch *gdbarch, gdbarch_displaced_step_restore_all_in_ptid_ftype *displaced_step_restore_all_in_ptid)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
void set_gdbarch_register_sim_regno(struct gdbarch *gdbarch, gdbarch_register_sim_regno_ftype *register_sim_regno)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_sofun_address_maybe_missing(struct gdbarch *gdbarch, int sofun_address_maybe_missing)
void set_gdbarch_valid_disassembler_options(struct gdbarch *gdbarch, const disasm_options_and_args_t *valid_disassembler_options)
void set_gdbarch_frame_align(struct gdbarch *gdbarch, gdbarch_frame_align_ftype *frame_align)
void set_gdbarch_displaced_step_finish(struct gdbarch *gdbarch, gdbarch_displaced_step_finish_ftype *displaced_step_finish)
void set_gdbarch_program_breakpoint_here_p(struct gdbarch *gdbarch, gdbarch_program_breakpoint_here_p_ftype *program_breakpoint_here_p)
void set_gdbarch_max_insn_length(struct gdbarch *gdbarch, ULONGEST max_insn_length)
void set_gdbarch_displaced_step_prepare(struct gdbarch *gdbarch, gdbarch_displaced_step_prepare_ftype *displaced_step_prepare)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_get_return_buf_addr(struct gdbarch *gdbarch, gdbarch_get_return_buf_addr_ftype *get_return_buf_addr)
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
struct type * gdbarch_register_type(struct gdbarch *gdbarch, int reg_nr)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_believe_pcc_promotion(struct gdbarch *gdbarch, int believe_pcc_promotion)
void set_gdbarch_have_nonsteppable_watchpoint(struct gdbarch *gdbarch, int have_nonsteppable_watchpoint)
int gdbarch_num_regs(struct gdbarch *gdbarch)
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
void set_gdbarch_skip_main_prologue(struct gdbarch *gdbarch, gdbarch_skip_main_prologue_ftype *skip_main_prologue)
void set_gdbarch_displaced_step_copy_insn(struct gdbarch *gdbarch, gdbarch_displaced_step_copy_insn_ftype *displaced_step_copy_insn)
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
enum bfd_endian gdbarch_byte_order_for_code(struct gdbarch *gdbarch)
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
void set_gdbarch_ax_pseudo_register_collect(struct gdbarch *gdbarch, gdbarch_ax_pseudo_register_collect_ftype *ax_pseudo_register_collect)
int gdbarch_sp_regnum(struct gdbarch *gdbarch)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
void set_gdbarch_frame_red_zone_size(struct gdbarch *gdbarch, int frame_red_zone_size)
void set_gdbarch_displaced_step_fixup(struct gdbarch *gdbarch, gdbarch_displaced_step_fixup_ftype *displaced_step_fixup)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
void set_gdbarch_stack_frame_destroyed_p(struct gdbarch *gdbarch, gdbarch_stack_frame_destroyed_p_ftype *stack_frame_destroyed_p)
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
void set_gdbarch_pseudo_register_write(struct gdbarch *gdbarch, gdbarch_pseudo_register_write_ftype *pseudo_register_write)
void set_gdbarch_num_pseudo_regs(struct gdbarch *gdbarch, int num_pseudo_regs)
void set_gdbarch_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, gdbarch_dwarf2_reg_to_regnum_ftype *dwarf2_reg_to_regnum)
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
void set_gdbarch_pseudo_register_read(struct gdbarch *gdbarch, gdbarch_pseudo_register_read_ftype *pseudo_register_read)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
const struct bfd_arch_info * gdbarch_bfd_arch_info(struct gdbarch *gdbarch)
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
void set_gdbarch_displaced_step_hw_singlestep(struct gdbarch *gdbarch, gdbarch_displaced_step_hw_singlestep_ftype *displaced_step_hw_singlestep)
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
ULONGEST gdbarch_max_insn_length(struct gdbarch *gdbarch)
void set_gdbarch_in_solib_return_trampoline(struct gdbarch *gdbarch, gdbarch_in_solib_return_trampoline_ftype *in_solib_return_trampoline)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
void set_gdbarch_frame_args_skip(struct gdbarch *gdbarch, CORE_ADDR frame_args_skip)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
#define GDBARCH_OBSTACK_CALLOC(GDBARCH, NR, TYPE)
static int gdbarch_num_cooked_regs(gdbarch *arch)
struct type * arch_composite_type(struct gdbarch *gdbarch, const char *name, enum type_code code)
const struct floatformat * floatformats_ieee_quad[BFD_ENDIAN_UNKNOWN]
struct type * init_vector_type(struct type *elt_type, int n)
struct type * arch_float_type(struct gdbarch *gdbarch, int bit, const char *name, const struct floatformat **floatformats)
void append_composite_type_field(struct type *t, const char *name, struct type *field)
mach_port_t mach_port_t name mach_port_t mach_port_t name kern_return_t int status
struct inferior * current_inferior(void)
std::string displaced_step_dump_bytes(const gdb_byte *buf, size_t len)
#define R(name, type, sim_num)
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
struct bound_minimal_symbol lookup_minimal_symbol_by_pc(CORE_ADDR pc)
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
static void initialize_tdesc_powerpc_32(void)
const struct target_desc * tdesc_powerpc_403
static void initialize_tdesc_powerpc_403(void)
const struct target_desc * tdesc_powerpc_403gc
static void initialize_tdesc_powerpc_403gc(void)
static void initialize_tdesc_powerpc_405(void)
const struct target_desc * tdesc_powerpc_405
static void initialize_tdesc_powerpc_505(void)
const struct target_desc * tdesc_powerpc_505
const struct target_desc * tdesc_powerpc_601
static void initialize_tdesc_powerpc_601(void)
static void initialize_tdesc_powerpc_602(void)
const struct target_desc * tdesc_powerpc_602
static void initialize_tdesc_powerpc_603(void)
const struct target_desc * tdesc_powerpc_603
static void initialize_tdesc_powerpc_604(void)
const struct target_desc * tdesc_powerpc_604
static void initialize_tdesc_powerpc_64(void)
const struct target_desc * tdesc_powerpc_64
const struct target_desc * tdesc_powerpc_7400
static void initialize_tdesc_powerpc_7400(void)
static void initialize_tdesc_powerpc_750(void)
const struct target_desc * tdesc_powerpc_750
static void initialize_tdesc_powerpc_860(void)
const struct target_desc * tdesc_powerpc_860
const struct target_desc * tdesc_powerpc_altivec32
static void initialize_tdesc_powerpc_altivec32(void)
const struct target_desc * tdesc_powerpc_altivec64
static void initialize_tdesc_powerpc_altivec64(void)
static void initialize_tdesc_powerpc_e500(void)
const struct target_desc * tdesc_powerpc_e500
static void initialize_tdesc_powerpc_vsx32(void)
static void initialize_tdesc_powerpc_vsx64(void)
void register_ppc_ravenscar_ops(struct gdbarch *gdbarch)
void register_e500_ravenscar_ops(struct gdbarch *gdbarch)
CORE_ADDR ppc_sysv_abi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
CORE_ADDR ppc64_sysv_abi_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
enum return_value_convention ppc64_sysv_abi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
CORE_ADDR ppc64_sysv_get_return_buf_addr(struct type *val_type, frame_info_ptr cur_frame)
enum return_value_convention ppc_sysv_abi_return_value(struct gdbarch *gdbarch, struct value *function, struct type *valtype, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
#define PPC_MAX_REGISTER_SIZE
@ POWERPC_LONG_DOUBLE_IBM128
@ POWERPC_LONG_DOUBLE_IEEE128
@ POWERPC_LONG_DOUBLE_AUTO
#define PPC_MAX_EPILOGUE_INSTRUCTIONS
@ PPC_SPE_UPPER_GP0_REGNUM
int record_full_arch_list_add_reg(struct regcache *regcache, int regnum)
int record_full_arch_list_add_mem(CORE_ADDR addr, int len)
int record_full_arch_list_add_end(void)
CORE_ADDR regcache_read_pc(struct regcache *regcache)
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
int register_size(struct gdbarch *gdbarch, int regnum)
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
struct type * register_type(struct gdbarch *gdbarch, int regnum)
int default_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
void(* func)(remote_target *remote, char *)
static void e500_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static int ppc_process_record_prefix_vsx_d_form(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static void v_alias_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
void ppc_collect_gregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *gregs, size_t len)
static enum auto_boolean powerpc_soft_float_global
static void rs6000_epilogue_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static int rs6000_pseudo_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
static bool rs6000_program_breakpoint_here_p(gdbarch *gdbarch, CORE_ADDR address)
static struct type * rs6000_builtin_type_vec128(struct gdbarch *gdbarch)
static int store_param_on_stack_p(unsigned long op, int framep, int *r0_contains_arg)
static CORE_ADDR rs6000_fetch_pointer_argument(frame_info_ptr frame, int argi, struct type *type)
static char * powerpc_disassembler_options
static int ppc_process_record_prefix_op33(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static enum register_status rs6000_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
int altivec_register_p(struct gdbarch *gdbarch, int regno)
static const char * powerpc_vector_abi_string
static int rs6000_register_to_value(frame_info_ptr frame, int regnum, struct type *type, gdb_byte *to, int *optimizedp, int *unavailablep)
static int rs6000_in_solib_return_trampoline(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
static bool ppc_displaced_step_hw_singlestep(struct gdbarch *gdbarch)
static const struct frame_base rs6000_frame_base
static const struct frame_unwind rs6000_frame_unwind
#define P_PPC_XT5(insn_suffix)
static CORE_ADDR rs6000_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static int ppc_process_record_prefix_op42(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
int spe_register_p(struct gdbarch *gdbarch, int regno)
CORE_ADDR ppc_insn_d_field(unsigned int insn)
static enum register_status e500_move_ev_register(move_ev_register_func move, struct regcache *regcache, int ev_reg, void *buffer)
void ppc_supply_fpregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *fpregs, size_t len)
static int rs6000_epilogue_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
static int ppc_process_record_op31_177(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn)
static enum register_status e500_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int ev_reg, gdb_byte *buffer)
static int bfd_uses_spe_extensions(bfd *abfd)
std::vector< CORE_ADDR > ppc_deal_with_atomic_sequence(struct regcache *regcache)
static constexpr uint32_t TX_INSN_MASK
static int ppc_fpreg_offset(ppc_gdbarch_tdep *tdep, const struct ppc_reg_offsets *offsets, int regnum)
static int ppc_process_record_prefix_store_vsx_ds_form(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static int ppc_process_record_op4(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
#define P_PPC_D(insn_prefix, insn_suffix)
static enum register_status vsx_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static const struct frame_unwind rs6000_epilogue_frame_unwind
static CORE_ADDR skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc, CORE_ADDR lim_pc, struct rs6000_framedata *fdata)
CORE_ADDR ppc_insn_prefix_dform(unsigned int insn1, unsigned int insn2)
static void rs6000_frame_this_id(frame_info_ptr this_frame, void **this_cache, struct frame_id *this_id)
static bool store_insn_p(unsigned long op, unsigned long rs, unsigned long ra, bool with_update)
static const struct ppc_variant * find_variant_by_arch(enum bfd_architecture arch, unsigned long mach)
int ppc_insns_match_pattern(frame_info_ptr frame, CORE_ADDR pc, const struct ppc_insn_pattern *pattern, unsigned int *insns)
static int ppc_record_vsr(struct regcache *regcache, ppc_gdbarch_tdep *tdep, int vsr)
static void ppc_displaced_step_restore_all_in_ptid(inferior *parent_inf, ptid_t ptid)
static int rs6000_adjust_frame_regnum(struct gdbarch *gdbarch, int num, int eh_frame_p)
static int ppc_process_prefix_instruction(int insn_prefix, int insn_suffix, CORE_ADDR addr, struct gdbarch *gdbarch, struct regcache *regcache)
void ppc_collect_reg(const struct regcache *regcache, int regnum, gdb_byte *regs, size_t offset, int regsize)
static struct cmd_list_element * showpowerpccmdlist
static bool is_tw_insn(uint32_t insn)
static int ppc_process_record_op61(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
int ppc_altivec_support_p(struct gdbarch *gdbarch)
static constexpr uint32_t TXI_INSN_MASK
static enum register_status efp_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static struct type * rs6000_pseudo_register_type(struct gdbarch *gdbarch, int regnum)
#define IS_DFP_PSEUDOREG(tdep, regnum)
#define IS_V_ALIAS_PSEUDOREG(tdep, regnum)
static void ppc_dwarf2_frame_init_reg(struct gdbarch *gdbarch, int regnum, struct dwarf2_frame_state_reg *reg, frame_info_ptr this_frame)
static constexpr uint32_t TD_INSN
#define IS_SPE_PSEUDOREG(tdep, regnum)
#define IS_CEFP_PSEUDOREG(tdep, regnum)
static void vsx_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static constexpr uint32_t TWI_INSN
static unsigned int read_insn(frame_info_ptr frame, CORE_ADDR pc)
CORE_ADDR ppc_insn_ds_field(unsigned int insn)
static constexpr uint32_t TDI_INSN
int ppc_floating_point_unit_p(struct gdbarch *gdbarch)
static enum register_status v_alias_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
static enum powerpc_vector_abi powerpc_vector_abi_global
enum register_status(* move_ev_register_func)(struct regcache *, int, void *)
static int ppc_process_record_prefix_op59_XX3(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static constexpr uint32_t TW_INSN
static int bl_to_blrl_insn_p(CORE_ADDR pc, int insn, enum bfd_endian byte_order)
static void set_sim_regno(int *table, int gdb_regno, int sim_regno)
static const registry< inferior >::key< ppc_inferior_data > ppc_inferior_data_key
static int rs6000_dwarf2_reg_to_regnum(struct gdbarch *gdbarch, int num)
#define ADDPCIS_TARGET_REGISTER
#define BL_DISPLACEMENT_MASK
static int rs6000_register_sim_regno(struct gdbarch *gdbarch, int reg)
void ppc_supply_reg(struct regcache *regcache, int regnum, const gdb_byte *regs, size_t offset, int regsize)
#define PPC_FIELD(value, from, len)
static unsigned long rs6000_fetch_instruction(struct gdbarch *gdbarch, const CORE_ADDR pc)
static void init_sim_regno_table(struct gdbarch *arch)
#define ADDPCIS_INSN_REGSHIFT
constexpr gdb_byte little_breakpoint[]
static int rs6000_stab_reg_to_regnum(struct gdbarch *gdbarch, int num)
constexpr gdb_byte big_breakpoint[]
static int ppc_process_record_op60(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static int ppc_process_record_prefix_op34(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static int ppc_process_record_op60_XX2(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static struct gdbarch * rs6000_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
static int max_skip_non_prologue_insns
static struct cmd_list_element * setpowerpccmdlist
ppc_inferior_data * get_ppc_per_inferior(inferior *inf)
#define IS_STORE_CONDITIONAL_INSN(insn)
static void ppc_displaced_step_fixup(struct gdbarch *gdbarch, struct displaced_step_copy_insn_closure *closure_, CORE_ADDR from, CORE_ADDR to, struct regcache *regs)
#define IS_CVSX_PSEUDOREG(tdep, regnum)
static int ppc_record_ACC_fpscr(struct regcache *regcache, ppc_gdbarch_tdep *tdep, int entry, bool save_fpscr)
static int ppc_process_record_op19(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static int ppc_process_record_op63(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static const char *const powerpc_vector_strings[]
#define P_PPC_XT(insn_suffix)
static int rs6000_stack_frame_destroyed_p(struct gdbarch *gdbarch, CORE_ADDR pc)
#define IS_LOAD_AND_RESERVE_INSN(insn)
static bool is_twi_insn(uint32_t insn)
static int ppc_process_record_prefix_store(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn_prefix, uint32_t insn_suffix)
static CORE_ADDR rs6000_frame_align(struct gdbarch *gdbarch, CORE_ADDR addr)
void ppc_supply_gregset(const struct regset *regset, struct regcache *regcache, int regnum, const void *gregs, size_t len)
int ppc_process_record(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr)
static void powerpc_set_soft_float(const char *args, int from_tty, struct cmd_list_element *c)
static void dfp_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static struct value * rs6000_epilogue_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static CORE_ADDR rs6000_skip_stack_check(struct gdbarch *gdbarch, const CORE_ADDR start_pc)
static void efp_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static bool is_tdi_insn(uint32_t insn)
#define ADDPCIS_INSN_MASK
static displaced_step_prepare_status ppc_displaced_step_prepare(gdbarch *arch, thread_info *thread, CORE_ADDR &displaced_pc)
static struct type * rs6000_builtin_type_vec64(struct gdbarch *gdbarch)
static void vsx_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static CORE_ADDR rs6000_skip_trampoline_code(frame_info_ptr frame, CORE_ADDR pc)
#define IS_VSX_PSEUDOREG(tdep, regnum)
static int rs6000_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static int rs6000_in_function_epilogue_frame_p(frame_info_ptr curfrm, struct gdbarch *gdbarch, CORE_ADDR pc)
static int ppc_process_record_op6(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
#define P_PPC_XT15(insn_suffix)
static void rs6000_value_to_register(frame_info_ptr frame, int regnum, struct type *type, const gdb_byte *from)
static void powerpc_set_vector_abi(const char *args, int from_tty, struct cmd_list_element *c)
static void show_powerpc_exact_watchpoints(struct ui_file *file, int from_tty, struct cmd_list_element *c, const char *value)
int vsx_register_p(struct gdbarch *gdbarch, int regno)
static bool is_td_insn(uint32_t insn)
static void rs6000_gen_return_address(struct gdbarch *gdbarch, struct agent_expr *ax, struct axs_value *value, CORE_ADDR scope)
static int ppc_greg_offset(struct gdbarch *gdbarch, ppc_gdbarch_tdep *tdep, const struct ppc_reg_offsets *offsets, int regnum, int *regsize)
static CORE_ADDR rs6000_frame_base_address(frame_info_ptr this_frame, void **this_cache)
#define IS_CDFP_PSEUDOREG(tdep, regnum)
static void v_alias_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static enum register_status dfp_pseudo_register_read(struct gdbarch *gdbarch, readable_regcache *regcache, int reg_nr, gdb_byte *buffer)
#define IS_EFP_PSEUDOREG(tdep, regnum)
static int ppc_process_record_prefix_op32(struct gdbarch *gdbarch, struct regcache *regcache, uint32_t insn_prefix, uint32_t insn_suffix)
static const struct frame_base * rs6000_frame_base_sniffer(frame_info_ptr this_frame)
static int ppc_process_record_op59(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static displaced_step_finish_status ppc_displaced_step_finish(gdbarch *arch, thread_info *thread, gdb_signal sig)
void _initialize_rs6000_tdep()
static enum register_status do_regcache_raw_write(struct regcache *regcache, int regnum, void *buffer)
static const char * rs6000_register_name(struct gdbarch *gdbarch, int regno)
static int rs6000_convert_register_p(struct gdbarch *gdbarch, int regnum, struct type *type)
static struct rs6000_frame_cache * rs6000_epilogue_frame_cache(frame_info_ptr this_frame, void **this_cache)
static CORE_ADDR rs6000_skip_main_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
static void efp_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static struct ppc_variant variants[]
static int insn_changes_sp_or_jumps(unsigned long insn)
void ppc_collect_fpregset(const struct regset *regset, const struct regcache *regcache, int regnum, void *fpregs, size_t len)
static int ppc_process_record_op31(struct gdbarch *gdbarch, struct regcache *regcache, CORE_ADDR addr, uint32_t insn)
static void rs6000_pseudo_register_write(struct gdbarch *gdbarch, struct regcache *regcache, int reg_nr, const gdb_byte *buffer)
static void dfp_ax_pseudo_register_collect(struct gdbarch *gdbarch, struct agent_expr *ax, int reg_nr)
static struct value * rs6000_frame_prev_register(frame_info_ptr this_frame, void **this_cache, int regnum)
static void rs6000_dump_tdep(struct gdbarch *gdbarch, struct ui_file *file)
const struct target_desc * tdesc_rs6000
static void initialize_tdesc_rs6000(void)
@ LEGACY_SIM_REGNO_IGNORE
struct minimal_symbol * minsym
struct type * builtin_declong
struct type * builtin_double
struct type * builtin_int8
struct type * builtin_uint128
struct type * builtin_int64
struct type * builtin_int32
struct type * builtin_int16
struct type * builtin_float
enum dwarf2_frame_reg_rule how
const char * linkage_name() const
struct type * ppc_builtin_type_vec128
struct type * ppc_builtin_type_vec64
int(* ppc_syscall_record)(struct regcache *regcache)
int ppc_vsr0_upper_regnum
gdb::optional< displaced_step_buffers > disp_step_buf
const struct target_desc ** tdesc
enum bfd_architecture arch
trad_frame_saved_reg * saved_regs
const struct bfd_arch_info * arch
void set_realreg(int realreg)
void set_addr(LONGEST addr)
void set_value(LONGEST val)
void set_name(const char *name)
void set_is_vector(bool is_vector)
struct value::@195::@196 reg
CORE_ADDR skip_prologue_using_sal(struct gdbarch *gdbarch, CORE_ADDR func_addr)
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
tdesc_arch_data_up tdesc_data_alloc(void)
const struct tdesc_feature * tdesc_find_feature(const struct target_desc *target_desc, const char *name)
int tdesc_numbered_register(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *name)
static const registry< gdbarch >::key< tdesc_arch_data > tdesc_data
void tdesc_use_registers(struct gdbarch *gdbarch, const struct target_desc *target_desc, tdesc_arch_data_up &&early_data, tdesc_unknown_register_ftype unk_reg_cb)
int tdesc_has_registers(const struct target_desc *target_desc)
void set_tdesc_pseudo_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *pseudo_type)
int tdesc_numbered_register_choices(const struct tdesc_feature *feature, struct tdesc_arch_data *data, int regno, const char *const names[])
int tdesc_register_bitsize(const struct tdesc_feature *feature, const char *name)
const char * tdesc_register_name(struct gdbarch *gdbarch, int regno)
void set_tdesc_pseudo_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *pseudo_reggroup_p)
std::unique_ptr< tdesc_arch_data, tdesc_arch_data_deleter > tdesc_arch_data_up
void target_float_convert(const gdb_byte *from, const struct type *from_type, gdb_byte *to, const struct type *to_type)
scoped_restore_tmpl< int > make_scoped_restore_show_memory_breakpoints(int show)
LONGEST target_read(struct target_ops *ops, enum target_object object, const char *annex, gdb_byte *buf, ULONGEST offset, LONGEST len)
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
int user_reg_map_name_to_regnum(struct gdbarch *gdbarch, const char *name, int len)
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
void gdb_printf(struct ui_file *stream, const char *format,...)