GDB (xrefs)
Loading...
Searching...
No Matches
/tmp/gdb-13.1/gdb/alpha-tdep.c
Go to the documentation of this file.
1/* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
2
3 Copyright (C) 1993-2023 Free Software Foundation, Inc.
4
5 This file is part of GDB.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19
20#include "defs.h"
21#include "frame.h"
22#include "frame-unwind.h"
23#include "frame-base.h"
24#include "dwarf2/frame.h"
25#include "inferior.h"
26#include "symtab.h"
27#include "value.h"
28#include "gdbcmd.h"
29#include "gdbcore.h"
30#include "dis-asm.h"
31#include "symfile.h"
32#include "objfiles.h"
33#include "linespec.h"
34#include "regcache.h"
35#include "reggroups.h"
36#include "arch-utils.h"
37#include "osabi.h"
38#include "block.h"
39#include "infcall.h"
40#include "trad-frame.h"
41
42#include "elf-bfd.h"
43
44#include "alpha-tdep.h"
45#include <algorithm>
46
47/* Instruction decoding. The notations for registers, immediates and
48 opcodes are the same as the one used in Compaq's Alpha architecture
49 handbook. */
50
51#define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
52
53/* Memory instruction format */
54#define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
55#define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
56#define MEM_DISP(insn) \
57 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
58
59static const int lda_opcode = 0x08;
60static const int stq_opcode = 0x2d;
61
62/* Branch instruction format */
63#define BR_RA(insn) MEM_RA(insn)
64
65static const int br_opcode = 0x30;
66static const int bne_opcode = 0x3d;
67
68/* Operate instruction format */
69#define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
70#define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
71#define OPR_RA(insn) MEM_RA(insn)
72#define OPR_RC(insn) ((insn & 0x1f))
73#define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
74
75static const int subq_opcode = 0x10;
76static const int subq_function = 0x29;
77
78
79/* Return the name of the REGNO register.
80
81 An empty name corresponds to a register number that used to
82 be used for a virtual register. That virtual register has
83 been removed, but the index is still reserved to maintain
84 compatibility with existing remote alpha targets. */
85
86static const char *
88{
89 static const char * const register_names[] =
90 {
91 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
92 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
93 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
94 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
95 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
96 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
97 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
98 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
99 "pc", "", "unique"
100 };
101
102 gdb_static_assert (ALPHA_NUM_REGS == ARRAY_SIZE (register_names));
103 return register_names[regno];
104}
105
106static int
108{
109 return (strlen (alpha_register_name (gdbarch, regno)) == 0);
110}
111
112static int
114{
115 return (regno == ALPHA_ZERO_REGNUM
116 || strlen (alpha_register_name (gdbarch, regno)) == 0);
117}
118
119static struct type *
121{
122 if (regno == ALPHA_SP_REGNUM || regno == ALPHA_GP_REGNUM)
124 if (regno == ALPHA_PC_REGNUM)
126
127 /* Don't need to worry about little vs big endian until
128 some jerk tries to port to alpha-unicosmk. */
129 if (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31)
131
133}
134
135/* Is REGNUM a member of REGGROUP? */
136
137static int
139 const struct reggroup *group)
140{
141 /* Filter out any registers eliminated, but whose regnum is
142 reserved for backward compatibility, e.g. the vfp. */
143 if (*gdbarch_register_name (gdbarch, regnum) == '\0')
144 return 0;
145
146 if (group == all_reggroup)
147 return 1;
148
149 /* Zero should not be saved or restored. Technically it is a general
150 register (just as $f31 would be a float if we represented it), but
151 there's no point displaying it during "info regs", so leave it out
152 of all groups except for "all". */
154 return 0;
155
156 /* All other registers are saved and restored. */
157 if (group == save_reggroup || group == restore_reggroup)
158 return 1;
159
160 /* All other groups are non-overlapping. */
161
162 /* Since this is really a PALcode memory slot... */
164 return group == system_reggroup;
165
166 /* Force the FPCR to be considered part of the floating point state. */
168 return group == float_reggroup;
169
171 return group == float_reggroup;
172 else
173 return group == general_reggroup;
174}
175
176/* The following represents exactly the conversion performed by
177 the LDS instruction. This applies to both single-precision
178 floating point and 32-bit integers. */
179
180static void
181alpha_lds (struct gdbarch *gdbarch, void *out, const void *in)
182{
183 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
184 ULONGEST mem
185 = extract_unsigned_integer ((const gdb_byte *) in, 4, byte_order);
186 ULONGEST frac = (mem >> 0) & 0x7fffff;
187 ULONGEST sign = (mem >> 31) & 1;
188 ULONGEST exp_msb = (mem >> 30) & 1;
189 ULONGEST exp_low = (mem >> 23) & 0x7f;
190 ULONGEST exp, reg;
191
192 exp = (exp_msb << 10) | exp_low;
193 if (exp_msb)
194 {
195 if (exp_low == 0x7f)
196 exp = 0x7ff;
197 }
198 else
199 {
200 if (exp_low != 0x00)
201 exp |= 0x380;
202 }
203
204 reg = (sign << 63) | (exp << 52) | (frac << 29);
205 store_unsigned_integer ((gdb_byte *) out, 8, byte_order, reg);
206}
207
208/* Similarly, this represents exactly the conversion performed by
209 the STS instruction. */
210
211static void
212alpha_sts (struct gdbarch *gdbarch, void *out, const void *in)
213{
214 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
215 ULONGEST reg, mem;
216
217 reg = extract_unsigned_integer ((const gdb_byte *) in, 8, byte_order);
218 mem = ((reg >> 32) & 0xc0000000) | ((reg >> 29) & 0x3fffffff);
219 store_unsigned_integer ((gdb_byte *) out, 4, byte_order, mem);
220}
221
222/* The alpha needs a conversion between register and memory format if the
223 register is a floating point register and memory format is float, as the
224 register format must be double or memory format is an integer with 4
225 bytes, as the representation of integers in floating point
226 registers is different. */
227
228static int
230 struct type *type)
231{
232 return (regno >= ALPHA_FP0_REGNUM && regno < ALPHA_FP0_REGNUM + 31
233 && type->length () == 4);
234}
235
236static int
238 struct type *valtype, gdb_byte *out,
239 int *optimizedp, int *unavailablep)
240{
241 struct gdbarch *gdbarch = get_frame_arch (frame);
242 struct value *value = get_frame_register_value (frame, regnum);
243
244 gdb_assert (value != NULL);
245 *optimizedp = value_optimized_out (value);
246 *unavailablep = !value_entirely_available (value);
247
248 if (*optimizedp || *unavailablep)
249 {
251 return 0;
252 }
253
254 /* Convert to VALTYPE. */
255
256 gdb_assert (valtype->length () == 4);
257 alpha_sts (gdbarch, out, value_contents_all (value).data ());
258
260 return 1;
261}
262
263static void
265 struct type *valtype, const gdb_byte *in)
266{
267 gdb_byte out[ALPHA_REGISTER_SIZE];
268
269 gdb_assert (valtype->length () == 4);
270 gdb_assert (register_size (get_frame_arch (frame), regnum)
272 alpha_lds (get_frame_arch (frame), out, in);
273
274 put_frame_register (frame, regnum, out);
275}
276
277
278/* The alpha passes the first six arguments in the registers, the rest on
279 the stack. The register arguments are stored in ARG_REG_BUFFER, and
280 then moved into the register file; this simplifies the passing of a
281 large struct which extends from the registers to the stack, plus avoids
282 three ptrace invocations per word.
283
284 We don't bother tracking which register values should go in integer
285 regs or fp regs; we load the same values into both.
286
287 If the called function is returning a structure, the address of the
288 structure to be returned is passed as a hidden first argument. */
289
290static CORE_ADDR
291alpha_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
292 struct regcache *regcache, CORE_ADDR bp_addr,
293 int nargs, struct value **args, CORE_ADDR sp,
294 function_call_return_method return_method,
295 CORE_ADDR struct_addr)
296{
297 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
298 int i;
299 int accumulate_size = (return_method == return_method_struct) ? 8 : 0;
300 struct alpha_arg
301 {
302 const gdb_byte *contents;
303 int len;
304 int offset;
305 };
306 struct alpha_arg *alpha_args = XALLOCAVEC (struct alpha_arg, nargs);
307 struct alpha_arg *m_arg;
308 gdb_byte arg_reg_buffer[ALPHA_REGISTER_SIZE * ALPHA_NUM_ARG_REGS];
309 int required_arg_regs;
310 CORE_ADDR func_addr = find_function_addr (function, NULL);
311
312 /* The ABI places the address of the called function in T12. */
314
315 /* Set the return address register to point to the entry point
316 of the program, where a breakpoint lies in wait. */
318
319 /* Lay out the arguments in memory. */
320 for (i = 0, m_arg = alpha_args; i < nargs; i++, m_arg++)
321 {
322 struct value *arg = args[i];
323 struct type *arg_type = check_typedef (value_type (arg));
324
325 /* Cast argument to long if necessary as the compiler does it too. */
326 switch (arg_type->code ())
327 {
328 case TYPE_CODE_INT:
329 case TYPE_CODE_BOOL:
330 case TYPE_CODE_CHAR:
331 case TYPE_CODE_RANGE:
332 case TYPE_CODE_ENUM:
333 if (arg_type->length () == 4)
334 {
335 /* 32-bit values must be sign-extended to 64 bits
336 even if the base data type is unsigned. */
337 arg_type = builtin_type (gdbarch)->builtin_int32;
338 arg = value_cast (arg_type, arg);
339 }
340 if (arg_type->length () < ALPHA_REGISTER_SIZE)
341 {
342 arg_type = builtin_type (gdbarch)->builtin_int64;
343 arg = value_cast (arg_type, arg);
344 }
345 break;
346
347 case TYPE_CODE_FLT:
348 /* "float" arguments loaded in registers must be passed in
349 register format, aka "double". */
350 if (accumulate_size < sizeof (arg_reg_buffer)
351 && arg_type->length () == 4)
352 {
353 arg_type = builtin_type (gdbarch)->builtin_double;
354 arg = value_cast (arg_type, arg);
355 }
356 /* Tru64 5.1 has a 128-bit long double, and passes this by
357 invisible reference. No one else uses this data type. */
358 else if (arg_type->length () == 16)
359 {
360 /* Allocate aligned storage. */
361 sp = (sp & -16) - 16;
362
363 /* Write the real data into the stack. */
364 write_memory (sp, value_contents (arg).data (), 16);
365
366 /* Construct the indirection. */
367 arg_type = lookup_pointer_type (arg_type);
368 arg = value_from_pointer (arg_type, sp);
369 }
370 break;
371
372 case TYPE_CODE_COMPLEX:
373 /* ??? The ABI says that complex values are passed as two
374 separate scalar values. This distinction only matters
375 for complex float. However, GCC does not implement this. */
376
377 /* Tru64 5.1 has a 128-bit long double, and passes this by
378 invisible reference. */
379 if (arg_type->length () == 32)
380 {
381 /* Allocate aligned storage. */
382 sp = (sp & -16) - 16;
383
384 /* Write the real data into the stack. */
385 write_memory (sp, value_contents (arg).data (), 32);
386
387 /* Construct the indirection. */
388 arg_type = lookup_pointer_type (arg_type);
389 arg = value_from_pointer (arg_type, sp);
390 }
391 break;
392
393 default:
394 break;
395 }
396 m_arg->len = arg_type->length ();
397 m_arg->offset = accumulate_size;
398 accumulate_size = (accumulate_size + m_arg->len + 7) & ~7;
399 m_arg->contents = value_contents (arg).data ();
400 }
401
402 /* Determine required argument register loads, loading an argument register
403 is expensive as it uses three ptrace calls. */
404 required_arg_regs = accumulate_size / 8;
405 if (required_arg_regs > ALPHA_NUM_ARG_REGS)
406 required_arg_regs = ALPHA_NUM_ARG_REGS;
407
408 /* Make room for the arguments on the stack. */
409 if (accumulate_size < sizeof(arg_reg_buffer))
410 accumulate_size = 0;
411 else
412 accumulate_size -= sizeof(arg_reg_buffer);
413 sp -= accumulate_size;
414
415 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
416 sp &= ~15;
417
418 /* `Push' arguments on the stack. */
419 for (i = nargs; m_arg--, --i >= 0;)
420 {
421 const gdb_byte *contents = m_arg->contents;
422 int offset = m_arg->offset;
423 int len = m_arg->len;
424
425 /* Copy the bytes destined for registers into arg_reg_buffer. */
426 if (offset < sizeof(arg_reg_buffer))
427 {
428 if (offset + len <= sizeof(arg_reg_buffer))
429 {
430 memcpy (arg_reg_buffer + offset, contents, len);
431 continue;
432 }
433 else
434 {
435 int tlen = sizeof(arg_reg_buffer) - offset;
436 memcpy (arg_reg_buffer + offset, contents, tlen);
437 offset += tlen;
438 contents += tlen;
439 len -= tlen;
440 }
441 }
442
443 /* Everything else goes to the stack. */
444 write_memory (sp + offset - sizeof(arg_reg_buffer), contents, len);
445 }
446 if (return_method == return_method_struct)
448 byte_order, struct_addr);
449
450 /* Load the argument registers. */
451 for (i = 0; i < required_arg_regs; i++)
452 {
454 arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
456 arg_reg_buffer + i * ALPHA_REGISTER_SIZE);
457 }
458
459 /* Finally, update the stack pointer. */
461
462 return sp;
463}
464
465/* Extract from REGCACHE the value about to be returned from a function
466 and copy it into VALBUF. */
467
468static void
470 gdb_byte *valbuf)
471{
472 struct gdbarch *gdbarch = regcache->arch ();
473 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
474 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
475 ULONGEST l;
476
477 switch (valtype->code ())
478 {
479 case TYPE_CODE_FLT:
480 switch (valtype->length ())
481 {
482 case 4:
484 alpha_sts (gdbarch, valbuf, raw_buffer);
485 break;
486
487 case 8:
489 break;
490
491 case 16:
493 read_memory (l, valbuf, 16);
494 break;
495
496 default:
497 internal_error (_("unknown floating point width"));
498 }
499 break;
500
501 case TYPE_CODE_COMPLEX:
502 switch (valtype->length ())
503 {
504 case 8:
505 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
507 break;
508
509 case 16:
511 regcache->cooked_read (ALPHA_FP0_REGNUM + 1, valbuf + 8);
512 break;
513
514 case 32:
516 read_memory (l, valbuf, 32);
517 break;
518
519 default:
520 internal_error (_("unknown floating point width"));
521 }
522 break;
523
524 default:
525 /* Assume everything else degenerates to an integer. */
527 store_unsigned_integer (valbuf, valtype->length (), byte_order, l);
528 break;
529 }
530}
531
532/* Insert the given value into REGCACHE as if it was being
533 returned by a function. */
534
535static void
537 const gdb_byte *valbuf)
538{
539 struct gdbarch *gdbarch = regcache->arch ();
540 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
541 ULONGEST l;
542
543 switch (valtype->code ())
544 {
545 case TYPE_CODE_FLT:
546 switch (valtype->length ())
547 {
548 case 4:
549 alpha_lds (gdbarch, raw_buffer, valbuf);
551 break;
552
553 case 8:
555 break;
556
557 case 16:
558 /* FIXME: 128-bit long doubles are returned like structures:
559 by writing into indirect storage provided by the caller
560 as the first argument. */
561 error (_("Cannot set a 128-bit long double return value."));
562
563 default:
564 internal_error (_("unknown floating point width"));
565 }
566 break;
567
568 case TYPE_CODE_COMPLEX:
569 switch (valtype->length ())
570 {
571 case 8:
572 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
574 break;
575
576 case 16:
578 regcache->cooked_write (ALPHA_FP0_REGNUM + 1, valbuf + 8);
579 break;
580
581 case 32:
582 /* FIXME: 128-bit long doubles are returned like structures:
583 by writing into indirect storage provided by the caller
584 as the first argument. */
585 error (_("Cannot set a 128-bit long double return value."));
586
587 default:
588 internal_error (_("unknown floating point width"));
589 }
590 break;
591
592 default:
593 /* Assume everything else degenerates to an integer. */
594 /* 32-bit values must be sign-extended to 64 bits
595 even if the base data type is unsigned. */
596 if (valtype->length () == 4)
598 l = unpack_long (valtype, valbuf);
600 break;
601 }
602}
603
604static enum return_value_convention
605alpha_return_value (struct gdbarch *gdbarch, struct value *function,
606 struct type *type, struct regcache *regcache,
607 gdb_byte *readbuf, const gdb_byte *writebuf)
608{
609 enum type_code code = type->code ();
610 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
611
612 if ((code == TYPE_CODE_STRUCT
613 || code == TYPE_CODE_UNION
614 || code == TYPE_CODE_ARRAY)
615 && tdep->return_in_memory (type))
616 {
617 if (readbuf)
618 {
619 ULONGEST addr;
621 read_memory (addr, readbuf, type->length ());
622 }
623
625 }
626
627 if (readbuf)
629 if (writebuf)
631
633}
634
635static int
637{
638 return 1;
639}
640
641
642constexpr gdb_byte alpha_break_insn[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
643
644typedef BP_MANIPULATION (alpha_break_insn) alpha_breakpoint;
645
646
647/* This returns the PC of the first insn after the prologue.
648 If we can't find the prologue, then return 0. */
649
650CORE_ADDR
651alpha_after_prologue (CORE_ADDR pc)
652{
653 struct symtab_and_line sal;
654 CORE_ADDR func_addr, func_end;
655
656 if (!find_pc_partial_function (pc, NULL, &func_addr, &func_end))
657 return 0;
658
659 sal = find_pc_line (func_addr, 0);
660 if (sal.end < func_end)
661 return sal.end;
662
663 /* The line after the prologue is after the end of the function. In this
664 case, tell the caller to find the prologue the hard way. */
665 return 0;
666}
667
668/* Read an instruction from memory at PC, looking through breakpoints. */
669
670unsigned int
671alpha_read_insn (struct gdbarch *gdbarch, CORE_ADDR pc)
672{
673 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
674 gdb_byte buf[ALPHA_INSN_SIZE];
675 int res;
676
677 res = target_read_memory (pc, buf, sizeof (buf));
678 if (res != 0)
680 return extract_unsigned_integer (buf, sizeof (buf), byte_order);
681}
682
683/* To skip prologues, I use this predicate. Returns either PC itself
684 if the code at PC does not look like a function prologue; otherwise
685 returns an address that (if we're lucky) follows the prologue. If
686 LENIENT, then we must skip everything which is involved in setting
687 up the frame (it's OK to skip more, just so long as we don't skip
688 anything which might clobber the registers which are being saved. */
689
690static CORE_ADDR
692{
693 unsigned long inst;
694 int offset;
695 CORE_ADDR post_prologue_pc;
696 gdb_byte buf[ALPHA_INSN_SIZE];
697
698 /* Silently return the unaltered pc upon memory errors.
699 This could happen on OSF/1 if decode_line_1 tries to skip the
700 prologue for quickstarted shared library functions when the
701 shared library is not yet mapped in.
702 Reading target memory is slow over serial lines, so we perform
703 this check only if the target has shared libraries (which all
704 Alpha targets do). */
705 if (target_read_memory (pc, buf, sizeof (buf)))
706 return pc;
707
708 /* See if we can determine the end of the prologue via the symbol table.
709 If so, then return either PC, or the PC after the prologue, whichever
710 is greater. */
711
712 post_prologue_pc = alpha_after_prologue (pc);
713 if (post_prologue_pc != 0)
714 return std::max (pc, post_prologue_pc);
715
716 /* Can't determine prologue from the symbol table, need to examine
717 instructions. */
718
719 /* Skip the typical prologue instructions. These are the stack adjustment
720 instruction and the instructions that save registers on the stack
721 or in the gcc frame. */
722 for (offset = 0; offset < 100; offset += ALPHA_INSN_SIZE)
723 {
724 inst = alpha_read_insn (gdbarch, pc + offset);
725
726 if ((inst & 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
727 continue;
728 if ((inst & 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
729 continue;
730 if ((inst & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
731 continue;
732 if ((inst & 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
733 continue;
734
735 if (((inst & 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
736 || (inst & 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
737 && (inst & 0x03e00000) != 0x03e00000) /* reg != $zero */
738 continue;
739
740 if (inst == 0x47de040f) /* bis sp,sp,fp */
741 continue;
742 if (inst == 0x47fe040f) /* bis zero,sp,fp */
743 continue;
744
745 break;
746 }
747 return pc + offset;
748}
749
750
751static const int ldl_l_opcode = 0x2a;
752static const int ldq_l_opcode = 0x2b;
753static const int stl_c_opcode = 0x2e;
754static const int stq_c_opcode = 0x2f;
755
756/* Checks for an atomic sequence of instructions beginning with a LDL_L/LDQ_L
757 instruction and ending with a STL_C/STQ_C instruction. If such a sequence
758 is found, attempt to step through it. A breakpoint is placed at the end of
759 the sequence. */
760
761static std::vector<CORE_ADDR>
763{
764 CORE_ADDR breaks[2] = {CORE_ADDR_MAX, CORE_ADDR_MAX};
765 CORE_ADDR loc = pc;
766 CORE_ADDR closing_insn; /* Instruction that closes the atomic sequence. */
767 unsigned int insn = alpha_read_insn (gdbarch, loc);
768 int insn_count;
769 int index;
770 int last_breakpoint = 0; /* Defaults to 0 (no breakpoints placed). */
771 const int atomic_sequence_length = 16; /* Instruction sequence length. */
772 int bc_insn_count = 0; /* Conditional branch instruction count. */
773
774 /* Assume all atomic sequences start with a LDL_L/LDQ_L instruction. */
775 if (INSN_OPCODE (insn) != ldl_l_opcode
776 && INSN_OPCODE (insn) != ldq_l_opcode)
777 return {};
778
779 /* Assume that no atomic sequence is longer than "atomic_sequence_length"
780 instructions. */
781 for (insn_count = 0; insn_count < atomic_sequence_length; ++insn_count)
782 {
784 insn = alpha_read_insn (gdbarch, loc);
785
786 /* Assume that there is at most one branch in the atomic
787 sequence. If a branch is found, put a breakpoint in
788 its destination address. */
789 if (INSN_OPCODE (insn) >= br_opcode)
790 {
791 int immediate = (insn & 0x001fffff) << 2;
792
793 immediate = (immediate ^ 0x400000) - 0x400000;
794
795 if (bc_insn_count >= 1)
796 return {}; /* More than one branch found, fallback
797 to the standard single-step code. */
798
799 breaks[1] = loc + ALPHA_INSN_SIZE + immediate;
800
801 bc_insn_count++;
802 last_breakpoint++;
803 }
804
805 if (INSN_OPCODE (insn) == stl_c_opcode
806 || INSN_OPCODE (insn) == stq_c_opcode)
807 break;
808 }
809
810 /* Assume that the atomic sequence ends with a STL_C/STQ_C instruction. */
811 if (INSN_OPCODE (insn) != stl_c_opcode
812 && INSN_OPCODE (insn) != stq_c_opcode)
813 return {};
814
815 closing_insn = loc;
817
818 /* Insert a breakpoint right after the end of the atomic sequence. */
819 breaks[0] = loc;
820
821 /* Check for duplicated breakpoints. Check also for a breakpoint
822 placed (branch instruction's destination) anywhere in sequence. */
823 if (last_breakpoint
824 && (breaks[1] == breaks[0]
825 || (breaks[1] >= pc && breaks[1] <= closing_insn)))
826 last_breakpoint = 0;
827
828 std::vector<CORE_ADDR> next_pcs;
829
830 for (index = 0; index <= last_breakpoint; index++)
831 next_pcs.push_back (breaks[index]);
832
833 return next_pcs;
834}
835
836
837/* Figure out where the longjmp will land.
838 We expect the first arg to be a pointer to the jmp_buf structure from
839 which we extract the PC (JB_PC) that we will land at. The PC is copied
840 into the "pc". This routine returns true on success. */
841
842static int
844{
845 struct gdbarch *gdbarch = get_frame_arch (frame);
846 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
847 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
848 CORE_ADDR jb_addr;
849 gdb_byte raw_buffer[ALPHA_REGISTER_SIZE];
850
852
853 if (target_read_memory (jb_addr + (tdep->jb_pc * tdep->jb_elt_size),
854 raw_buffer, tdep->jb_elt_size))
855 return 0;
856
857 *pc = extract_unsigned_integer (raw_buffer, tdep->jb_elt_size, byte_order);
858 return 1;
859}
860
861
862/* Frame unwinder for signal trampolines. We use alpha tdep bits that
863 describe the location and shape of the sigcontext structure. After
864 that, all registers are in memory, so it's easy. */
865/* ??? Shouldn't we be able to do this generically, rather than with
866 OSABI data specific to Alpha? */
867
869{
871};
872
873static struct alpha_sigtramp_unwind_cache *
875 void **this_prologue_cache)
876{
877 struct alpha_sigtramp_unwind_cache *info;
878
879 if (*this_prologue_cache)
880 return (struct alpha_sigtramp_unwind_cache *) *this_prologue_cache;
881
883 *this_prologue_cache = info;
884
885 gdbarch *arch = get_frame_arch (this_frame);
886 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (arch);
887 info->sigcontext_addr = tdep->sigcontext_addr (this_frame);
888
889 return info;
890}
891
892/* Return the address of REGNUM in a sigtramp frame. Since this is
893 all arithmetic, it doesn't seem worthwhile to cache it. */
894
895static CORE_ADDR
897 CORE_ADDR sigcontext_addr, int regnum)
898{
899 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
900
901 if (regnum >= 0 && regnum < 32)
902 return sigcontext_addr + tdep->sc_regs_offset + regnum * 8;
903 else if (regnum >= ALPHA_FP0_REGNUM && regnum < ALPHA_FP0_REGNUM + 32)
904 return sigcontext_addr + tdep->sc_fpregs_offset + regnum * 8;
905 else if (regnum == ALPHA_PC_REGNUM)
906 return sigcontext_addr + tdep->sc_pc_offset;
907
908 return 0;
909}
910
911/* Given a GDB frame, determine the address of the calling function's
912 frame. This will be used to create a new GDB frame struct. */
913
914static void
916 void **this_prologue_cache,
917 struct frame_id *this_id)
918{
919 struct gdbarch *gdbarch = get_frame_arch (this_frame);
920 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
921 struct alpha_sigtramp_unwind_cache *info
922 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
923 CORE_ADDR stack_addr, code_addr;
924
925 /* If the OSABI couldn't locate the sigcontext, give up. */
926 if (info->sigcontext_addr == 0)
927 return;
928
929 /* If we have dynamic signal trampolines, find their start.
930 If we do not, then we must assume there is a symbol record
931 that can provide the start address. */
932 if (tdep->dynamic_sigtramp_offset)
933 {
934 int offset;
935 code_addr = get_frame_pc (this_frame);
936 offset = tdep->dynamic_sigtramp_offset (gdbarch, code_addr);
937 if (offset >= 0)
938 code_addr -= offset;
939 else
940 code_addr = 0;
941 }
942 else
943 code_addr = get_frame_func (this_frame);
944
945 /* The stack address is trivially read from the sigcontext. */
946 stack_addr = alpha_sigtramp_register_address (gdbarch, info->sigcontext_addr,
948 stack_addr = get_frame_memory_unsigned (this_frame, stack_addr,
950
951 *this_id = frame_id_build (stack_addr, code_addr);
952}
953
954/* Retrieve the value of REGNUM in FRAME. Don't give up! */
955
956static struct value *
958 void **this_prologue_cache, int regnum)
959{
960 struct alpha_sigtramp_unwind_cache *info
961 = alpha_sigtramp_frame_unwind_cache (this_frame, this_prologue_cache);
962 CORE_ADDR addr;
963
964 if (info->sigcontext_addr != 0)
965 {
966 /* All integer and fp registers are stored in memory. */
968 info->sigcontext_addr, regnum);
969 if (addr != 0)
970 return frame_unwind_got_memory (this_frame, regnum, addr);
971 }
972
973 /* This extra register may actually be in the sigcontext, but our
974 current description of it in alpha_sigtramp_frame_unwind_cache
975 doesn't include it. Too bad. Fall back on whatever's in the
976 outer frame. */
977 return frame_unwind_got_register (this_frame, regnum, regnum);
978}
979
980static int
982 frame_info_ptr this_frame,
983 void **this_prologue_cache)
984{
985 struct gdbarch *gdbarch = get_frame_arch (this_frame);
986 CORE_ADDR pc = get_frame_pc (this_frame);
987 const char *name;
988
989 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
990 look at tramp-frame.h and other simpler per-architecture
991 sigtramp unwinders. */
992
993 /* We shouldn't even bother to try if the OSABI didn't register a
994 sigcontext_addr handler or pc_in_sigtramp handler. */
995 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
996 if (tdep->sigcontext_addr == NULL)
997 return 0;
998
999 if (tdep->pc_in_sigtramp == NULL)
1000 return 0;
1001
1002 /* Otherwise we should be in a signal frame. */
1003 find_pc_partial_function (pc, &name, NULL, NULL);
1004 if (tdep->pc_in_sigtramp (gdbarch, pc, name))
1005 return 1;
1006
1007 return 0;
1008}
1009
1011{
1012 "alpha sigtramp",
1017 NULL,
1019};
1020
1021
1022
1023/* Heuristic_proc_start may hunt through the text section for a long
1024 time across a 2400 baud serial line. Allows the user to limit this
1025 search. */
1027
1028/* Attempt to locate the start of the function containing PC. We assume that
1029 the previous function ends with an about_to_return insn. Not foolproof by
1030 any means, since gcc is happy to put the epilogue in the middle of a
1031 function. But we're guessing anyway... */
1032
1033static CORE_ADDR
1035{
1036 alpha_gdbarch_tdep *tdep = gdbarch_tdep<alpha_gdbarch_tdep> (gdbarch);
1037 CORE_ADDR last_non_nop = pc;
1038 CORE_ADDR fence = pc - heuristic_fence_post;
1039 CORE_ADDR orig_pc = pc;
1040 CORE_ADDR func;
1041 struct inferior *inf;
1042
1043 if (pc == 0)
1044 return 0;
1045
1046 /* First see if we can find the start of the function from minimal
1047 symbol information. This can succeed with a binary that doesn't
1048 have debug info, but hasn't been stripped. */
1050 if (func)
1051 return func;
1052
1053 if (heuristic_fence_post == -1
1054 || fence < tdep->vm_min_address)
1055 fence = tdep->vm_min_address;
1056
1057 /* Search back for previous return; also stop at a 0, which might be
1058 seen for instance before the start of a code section. Don't include
1059 nops, since this usually indicates padding between functions. */
1060 for (pc -= ALPHA_INSN_SIZE; pc >= fence; pc -= ALPHA_INSN_SIZE)
1061 {
1062 unsigned int insn = alpha_read_insn (gdbarch, pc);
1063 switch (insn)
1064 {
1065 case 0: /* invalid insn */
1066 case 0x6bfa8001: /* ret $31,($26),1 */
1067 return last_non_nop;
1068
1069 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
1070 case 0x47ff041f: /* nop: bis $31,$31,$31 */
1071 break;
1072
1073 default:
1074 last_non_nop = pc;
1075 break;
1076 }
1077 }
1078
1079 inf = current_inferior ();
1080
1081 /* It's not clear to me why we reach this point when stopping quietly,
1082 but with this test, at least we don't print out warnings for every
1083 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
1084 if (inf->control.stop_soon == NO_STOP_QUIETLY)
1085 {
1086 static int blurb_printed = 0;
1087
1088 if (fence == tdep->vm_min_address)
1089 warning (_("Hit beginning of text section without finding \
1090enclosing function for address %s"), paddress (gdbarch, orig_pc));
1091 else
1092 warning (_("Hit heuristic-fence-post without finding \
1093enclosing function for address %s"), paddress (gdbarch, orig_pc));
1094
1095 if (!blurb_printed)
1096 {
1097 gdb_printf (_("\
1098This warning occurs if you are debugging a function without any symbols\n\
1099(for example, in a stripped executable). In that case, you may wish to\n\
1100increase the size of the search with the `set heuristic-fence-post' command.\n\
1101\n\
1102Otherwise, you told GDB there was a function where there isn't one, or\n\
1103(more likely) you have encountered a bug in GDB.\n"));
1104 blurb_printed = 1;
1105 }
1106 }
1107
1108 return 0;
1109}
1110
1111/* Fallback alpha frame unwinder. Uses instruction scanning and knows
1112 something about the traditional layout of alpha stack frames. */
1113
1115{
1116 CORE_ADDR vfp;
1117 CORE_ADDR start_pc;
1120};
1121
1122/* If a probing loop sequence starts at PC, simulate it and compute
1123 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1124 FRAME_SIZE unchanged. */
1125
1126static void
1128 int *frame_size)
1129{
1130 CORE_ADDR cur_pc = *pc;
1131 int cur_frame_size = *frame_size;
1132 int nb_of_iterations, reg_index, reg_probe;
1133 unsigned int insn;
1134
1135 /* The following pattern is recognized as a probing loop:
1136
1137 lda REG_INDEX,NB_OF_ITERATIONS
1138 lda REG_PROBE,<immediate>(sp)
1139
1140 LOOP_START:
1141 stq zero,<immediate>(REG_PROBE)
1142 subq REG_INDEX,0x1,REG_INDEX
1143 lda REG_PROBE,<immediate>(REG_PROBE)
1144 bne REG_INDEX, LOOP_START
1145
1146 lda sp,<immediate>(REG_PROBE)
1147
1148 If anything different is found, the function returns without
1149 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1150 after this sequence, and FRAME_SIZE will be updated. */
1151
1152 /* lda REG_INDEX,NB_OF_ITERATIONS */
1153
1154 insn = alpha_read_insn (gdbarch, cur_pc);
1155 if (INSN_OPCODE (insn) != lda_opcode)
1156 return;
1157 reg_index = MEM_RA (insn);
1158 nb_of_iterations = MEM_DISP (insn);
1159
1160 /* lda REG_PROBE,<immediate>(sp) */
1161
1162 cur_pc += ALPHA_INSN_SIZE;
1163 insn = alpha_read_insn (gdbarch, cur_pc);
1164 if (INSN_OPCODE (insn) != lda_opcode
1165 || MEM_RB (insn) != ALPHA_SP_REGNUM)
1166 return;
1167 reg_probe = MEM_RA (insn);
1168 cur_frame_size -= MEM_DISP (insn);
1169
1170 /* stq zero,<immediate>(REG_PROBE) */
1171
1172 cur_pc += ALPHA_INSN_SIZE;
1173 insn = alpha_read_insn (gdbarch, cur_pc);
1174 if (INSN_OPCODE (insn) != stq_opcode
1175 || MEM_RA (insn) != 0x1f
1176 || MEM_RB (insn) != reg_probe)
1177 return;
1178
1179 /* subq REG_INDEX,0x1,REG_INDEX */
1180
1181 cur_pc += ALPHA_INSN_SIZE;
1182 insn = alpha_read_insn (gdbarch, cur_pc);
1183 if (INSN_OPCODE (insn) != subq_opcode
1184 || !OPR_HAS_IMMEDIATE (insn)
1185 || OPR_FUNCTION (insn) != subq_function
1186 || OPR_LIT(insn) != 1
1187 || OPR_RA (insn) != reg_index
1188 || OPR_RC (insn) != reg_index)
1189 return;
1190
1191 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1192
1193 cur_pc += ALPHA_INSN_SIZE;
1194 insn = alpha_read_insn (gdbarch, cur_pc);
1195 if (INSN_OPCODE (insn) != lda_opcode
1196 || MEM_RA (insn) != reg_probe
1197 || MEM_RB (insn) != reg_probe)
1198 return;
1199 cur_frame_size -= MEM_DISP (insn) * nb_of_iterations;
1200
1201 /* bne REG_INDEX, LOOP_START */
1202
1203 cur_pc += ALPHA_INSN_SIZE;
1204 insn = alpha_read_insn (gdbarch, cur_pc);
1205 if (INSN_OPCODE (insn) != bne_opcode
1206 || MEM_RA (insn) != reg_index)
1207 return;
1208
1209 /* lda sp,<immediate>(REG_PROBE) */
1210
1211 cur_pc += ALPHA_INSN_SIZE;
1212 insn = alpha_read_insn (gdbarch, cur_pc);
1213 if (INSN_OPCODE (insn) != lda_opcode
1214 || MEM_RA (insn) != ALPHA_SP_REGNUM
1215 || MEM_RB (insn) != reg_probe)
1216 return;
1217 cur_frame_size -= MEM_DISP (insn);
1218
1219 *pc = cur_pc;
1220 *frame_size = cur_frame_size;
1221}
1222
1223static struct alpha_heuristic_unwind_cache *
1225 void **this_prologue_cache,
1226 CORE_ADDR start_pc)
1227{
1228 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1229 struct alpha_heuristic_unwind_cache *info;
1230 ULONGEST val;
1231 CORE_ADDR limit_pc, cur_pc;
1232 int frame_reg, frame_size, return_reg, reg;
1233
1234 if (*this_prologue_cache)
1235 return (struct alpha_heuristic_unwind_cache *) *this_prologue_cache;
1236
1238 *this_prologue_cache = info;
1239 info->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1240
1241 limit_pc = get_frame_pc (this_frame);
1242 if (start_pc == 0)
1244 info->start_pc = start_pc;
1245
1246 frame_reg = ALPHA_SP_REGNUM;
1247 frame_size = 0;
1248 return_reg = -1;
1249
1250 /* If we've identified a likely place to start, do code scanning. */
1251 if (start_pc != 0)
1252 {
1253 /* Limit the forward search to 50 instructions. */
1254 if (start_pc + 200 < limit_pc)
1255 limit_pc = start_pc + 200;
1256
1257 for (cur_pc = start_pc; cur_pc < limit_pc; cur_pc += ALPHA_INSN_SIZE)
1258 {
1259 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1260
1261 if ((word & 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1262 {
1263 if (word & 0x8000)
1264 {
1265 /* Consider only the first stack allocation instruction
1266 to contain the static size of the frame. */
1267 if (frame_size == 0)
1268 frame_size = (-word) & 0xffff;
1269 }
1270 else
1271 {
1272 /* Exit loop if a positive stack adjustment is found, which
1273 usually means that the stack cleanup code in the function
1274 epilogue is reached. */
1275 break;
1276 }
1277 }
1278 else if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1279 {
1280 reg = (word & 0x03e00000) >> 21;
1281
1282 /* Ignore this instruction if we have already encountered
1283 an instruction saving the same register earlier in the
1284 function code. The current instruction does not tell
1285 us where the original value upon function entry is saved.
1286 All it says is that the function we are scanning reused
1287 that register for some computation of its own, and is now
1288 saving its result. */
1289 if (info->saved_regs[reg].is_addr ())
1290 continue;
1291
1292 if (reg == 31)
1293 continue;
1294
1295 /* Do not compute the address where the register was saved yet,
1296 because we don't know yet if the offset will need to be
1297 relative to $sp or $fp (we can not compute the address
1298 relative to $sp if $sp is updated during the execution of
1299 the current subroutine, for instance when doing some alloca).
1300 So just store the offset for the moment, and compute the
1301 address later when we know whether this frame has a frame
1302 pointer or not. */
1303 /* Hack: temporarily add one, so that the offset is non-zero
1304 and we can tell which registers have save offsets below. */
1305 info->saved_regs[reg].set_addr ((word & 0xffff) + 1);
1306
1307 /* Starting with OSF/1-3.2C, the system libraries are shipped
1308 without local symbols, but they still contain procedure
1309 descriptors without a symbol reference. GDB is currently
1310 unable to find these procedure descriptors and uses
1311 heuristic_proc_desc instead.
1312 As some low level compiler support routines (__div*, __add*)
1313 use a non-standard return address register, we have to
1314 add some heuristics to determine the return address register,
1315 or stepping over these routines will fail.
1316 Usually the return address register is the first register
1317 saved on the stack, but assembler optimization might
1318 rearrange the register saves.
1319 So we recognize only a few registers (t7, t9, ra) within
1320 the procedure prologue as valid return address registers.
1321 If we encounter a return instruction, we extract the
1322 return address register from it.
1323
1324 FIXME: Rewriting GDB to access the procedure descriptors,
1325 e.g. via the minimal symbol table, might obviate this
1326 hack. */
1327 if (return_reg == -1
1328 && cur_pc < (start_pc + 80)
1329 && (reg == ALPHA_T7_REGNUM
1330 || reg == ALPHA_T9_REGNUM
1331 || reg == ALPHA_RA_REGNUM))
1332 return_reg = reg;
1333 }
1334 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1335 return_reg = (word >> 16) & 0x1f;
1336 else if (word == 0x47de040f) /* bis sp,sp,fp */
1337 frame_reg = ALPHA_GCC_FP_REGNUM;
1338 else if (word == 0x47fe040f) /* bis zero,sp,fp */
1339 frame_reg = ALPHA_GCC_FP_REGNUM;
1340
1341 alpha_heuristic_analyze_probing_loop (gdbarch, &cur_pc, &frame_size);
1342 }
1343
1344 /* If we haven't found a valid return address register yet, keep
1345 searching in the procedure prologue. */
1346 if (return_reg == -1)
1347 {
1348 while (cur_pc < (limit_pc + 80) && cur_pc < (start_pc + 80))
1349 {
1350 unsigned int word = alpha_read_insn (gdbarch, cur_pc);
1351
1352 if ((word & 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1353 {
1354 reg = (word & 0x03e00000) >> 21;
1355 if (reg == ALPHA_T7_REGNUM
1356 || reg == ALPHA_T9_REGNUM
1357 || reg == ALPHA_RA_REGNUM)
1358 {
1359 return_reg = reg;
1360 break;
1361 }
1362 }
1363 else if ((word & 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1364 {
1365 return_reg = (word >> 16) & 0x1f;
1366 break;
1367 }
1368
1369 cur_pc += ALPHA_INSN_SIZE;
1370 }
1371 }
1372 }
1373
1374 /* Failing that, do default to the customary RA. */
1375 if (return_reg == -1)
1377 info->return_reg = return_reg;
1378
1379 val = get_frame_register_unsigned (this_frame, frame_reg);
1380 info->vfp = val + frame_size;
1381
1382 /* Convert offsets to absolute addresses. See above about adding
1383 one to the offsets to make all detected offsets non-zero. */
1384 for (reg = 0; reg < ALPHA_NUM_REGS; ++reg)
1385 if (info->saved_regs[reg].is_addr ())
1386 info->saved_regs[reg].set_addr (info->saved_regs[reg].addr ()
1387 + val - 1);
1388
1389 /* The stack pointer of the previous frame is computed by popping
1390 the current stack frame. */
1391 if (!info->saved_regs[ALPHA_SP_REGNUM].is_addr ())
1392 info->saved_regs[ALPHA_SP_REGNUM].set_value (info->vfp);
1393
1394 return info;
1395}
1396
1397/* Given a GDB frame, determine the address of the calling function's
1398 frame. This will be used to create a new GDB frame struct. */
1399
1400static void
1402 void **this_prologue_cache,
1403 struct frame_id *this_id)
1404{
1405 struct alpha_heuristic_unwind_cache *info
1406 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1407
1408 *this_id = frame_id_build (info->vfp, info->start_pc);
1409}
1410
1411/* Retrieve the value of REGNUM in FRAME. Don't give up! */
1412
1413static struct value *
1415 void **this_prologue_cache, int regnum)
1416{
1417 struct alpha_heuristic_unwind_cache *info
1418 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1419
1420 /* The PC of the previous frame is stored in the link register of
1421 the current frame. Frob regnum so that we pull the value from
1422 the correct place. */
1423 if (regnum == ALPHA_PC_REGNUM)
1424 regnum = info->return_reg;
1425
1426 return trad_frame_get_prev_register (this_frame, info->saved_regs, regnum);
1427}
1428
1430{
1431 "alpha prologue",
1436 NULL,
1438};
1439
1440static CORE_ADDR
1442 void **this_prologue_cache)
1443{
1444 struct alpha_heuristic_unwind_cache *info
1445 = alpha_heuristic_frame_unwind_cache (this_frame, this_prologue_cache, 0);
1446
1447 return info->vfp;
1448}
1449
1455};
1456
1457/* Just like reinit_frame_cache, but with the right arguments to be
1458 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1459
1460static void
1462 int from_tty, struct cmd_list_element *c)
1463{
1465}
1466
1467/* Helper routines for alpha*-nat.c files to move register sets to and
1468 from core files. The UNIQUE pointer is allowed to be NULL, as most
1469 targets don't supply this value in their core files. */
1470
1471void
1473 const void *r0_r30, const void *pc, const void *unique)
1474{
1475 const gdb_byte *regs = (const gdb_byte *) r0_r30;
1476 int i;
1477
1478 for (i = 0; i < 31; ++i)
1479 if (regno == i || regno == -1)
1480 regcache->raw_supply (i, regs + i * 8);
1481
1482 if (regno == ALPHA_ZERO_REGNUM || regno == -1)
1483 {
1484 const gdb_byte zero[8] = { 0 };
1485
1487 }
1488
1489 if (regno == ALPHA_PC_REGNUM || regno == -1)
1491
1492 if (regno == ALPHA_UNIQUE_REGNUM || regno == -1)
1494}
1495
1496void
1498 int regno, void *r0_r30, void *pc, void *unique)
1499{
1500 gdb_byte *regs = (gdb_byte *) r0_r30;
1501 int i;
1502
1503 for (i = 0; i < 31; ++i)
1504 if (regno == i || regno == -1)
1505 regcache->raw_collect (i, regs + i * 8);
1506
1507 if (regno == ALPHA_PC_REGNUM || regno == -1)
1509
1510 if (unique && (regno == ALPHA_UNIQUE_REGNUM || regno == -1))
1512}
1513
1514void
1516 const void *f0_f30, const void *fpcr)
1517{
1518 const gdb_byte *regs = (const gdb_byte *) f0_f30;
1519 int i;
1520
1521 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1522 if (regno == i || regno == -1)
1523 regcache->raw_supply (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
1524
1525 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1527}
1528
1529void
1531 int regno, void *f0_f30, void *fpcr)
1532{
1533 gdb_byte *regs = (gdb_byte *) f0_f30;
1534 int i;
1535
1536 for (i = ALPHA_FP0_REGNUM; i < ALPHA_FP0_REGNUM + 31; ++i)
1537 if (regno == i || regno == -1)
1538 regcache->raw_collect (i, regs + (i - ALPHA_FP0_REGNUM) * 8);
1539
1540 if (regno == ALPHA_FPCR_REGNUM || regno == -1)
1542}
1543
1544
1545
1546/* Return nonzero if the G_floating register value in REG is equal to
1547 zero for FP control instructions. */
1548
1549static int
1551{
1552 /* Check that all bits except the sign bit are zero. */
1553 const LONGEST zero_mask = ((LONGEST) 1 << 63) ^ -1;
1554
1555 return ((reg & zero_mask) == 0);
1556}
1557
1558/* Return the value of the sign bit for the G_floating register
1559 value held in REG. */
1560
1561static int
1563{
1564 const LONGEST sign_mask = (LONGEST) 1 << 63;
1565
1566 return ((reg & sign_mask) != 0);
1567}
1568
1569/* alpha_software_single_step() is called just before we want to resume
1570 the inferior, if we want to single-step it but there is no hardware
1571 or kernel single-step support (NetBSD on Alpha, for example). We find
1572 the target of the coming instruction and breakpoint it. */
1573
1574static CORE_ADDR
1575alpha_next_pc (struct regcache *regcache, CORE_ADDR pc)
1576{
1577 struct gdbarch *gdbarch = regcache->arch ();
1578 unsigned int insn;
1579 unsigned int op;
1580 int regno;
1581 int offset;
1582 LONGEST rav;
1583
1584 insn = alpha_read_insn (gdbarch, pc);
1585
1586 /* Opcode is top 6 bits. */
1587 op = (insn >> 26) & 0x3f;
1588
1589 if (op == 0x1a)
1590 {
1591 /* Jump format: target PC is:
1592 RB & ~3 */
1593 return (regcache_raw_get_unsigned (regcache, (insn >> 16) & 0x1f) & ~3);
1594 }
1595
1596 if ((op & 0x30) == 0x30)
1597 {
1598 /* Branch format: target PC is:
1599 (new PC) + (4 * sext(displacement)) */
1600 if (op == 0x30 /* BR */
1601 || op == 0x34) /* BSR */
1602 {
1603 branch_taken:
1604 offset = (insn & 0x001fffff);
1605 if (offset & 0x00100000)
1606 offset |= 0xffe00000;
1607 offset *= ALPHA_INSN_SIZE;
1608 return (pc + ALPHA_INSN_SIZE + offset);
1609 }
1610
1611 /* Need to determine if branch is taken; read RA. */
1612 regno = (insn >> 21) & 0x1f;
1613 switch (op)
1614 {
1615 case 0x31: /* FBEQ */
1616 case 0x36: /* FBGE */
1617 case 0x37: /* FBGT */
1618 case 0x33: /* FBLE */
1619 case 0x32: /* FBLT */
1620 case 0x35: /* FBNE */
1621 regno += gdbarch_fp0_regnum (gdbarch);
1622 }
1623
1624 rav = regcache_raw_get_signed (regcache, regno);
1625
1626 switch (op)
1627 {
1628 case 0x38: /* BLBC */
1629 if ((rav & 1) == 0)
1630 goto branch_taken;
1631 break;
1632 case 0x3c: /* BLBS */
1633 if (rav & 1)
1634 goto branch_taken;
1635 break;
1636 case 0x39: /* BEQ */
1637 if (rav == 0)
1638 goto branch_taken;
1639 break;
1640 case 0x3d: /* BNE */
1641 if (rav != 0)
1642 goto branch_taken;
1643 break;
1644 case 0x3a: /* BLT */
1645 if (rav < 0)
1646 goto branch_taken;
1647 break;
1648 case 0x3b: /* BLE */
1649 if (rav <= 0)
1650 goto branch_taken;
1651 break;
1652 case 0x3f: /* BGT */
1653 if (rav > 0)
1654 goto branch_taken;
1655 break;
1656 case 0x3e: /* BGE */
1657 if (rav >= 0)
1658 goto branch_taken;
1659 break;
1660
1661 /* Floating point branches. */
1662
1663 case 0x31: /* FBEQ */
1664 if (fp_register_zero_p (rav))
1665 goto branch_taken;
1666 break;
1667 case 0x36: /* FBGE */
1668 if (fp_register_sign_bit (rav) == 0 || fp_register_zero_p (rav))
1669 goto branch_taken;
1670 break;
1671 case 0x37: /* FBGT */
1672 if (fp_register_sign_bit (rav) == 0 && ! fp_register_zero_p (rav))
1673 goto branch_taken;
1674 break;
1675 case 0x33: /* FBLE */
1676 if (fp_register_sign_bit (rav) == 1 || fp_register_zero_p (rav))
1677 goto branch_taken;
1678 break;
1679 case 0x32: /* FBLT */
1680 if (fp_register_sign_bit (rav) == 1 && ! fp_register_zero_p (rav))
1681 goto branch_taken;
1682 break;
1683 case 0x35: /* FBNE */
1684 if (! fp_register_zero_p (rav))
1685 goto branch_taken;
1686 break;
1687 }
1688 }
1689
1690 /* Not a branch or branch not taken; target PC is:
1691 pc + 4 */
1692 return (pc + ALPHA_INSN_SIZE);
1693}
1694
1695std::vector<CORE_ADDR>
1697{
1698 struct gdbarch *gdbarch = regcache->arch ();
1699
1700 CORE_ADDR pc = regcache_read_pc (regcache);
1701
1702 std::vector<CORE_ADDR> next_pcs
1704 if (!next_pcs.empty ())
1705 return next_pcs;
1706
1707 CORE_ADDR next_pc = alpha_next_pc (regcache, pc);
1708 return {next_pc};
1709}
1710
1711
1712/* Initialize the current architecture based on INFO. If possible, re-use an
1713 architecture from ARCHES, which is a list of architectures already created
1714 during this debugging session.
1715
1716 Called e.g. at program startup, when reading a core file, and when reading
1717 a binary file. */
1718
1719static struct gdbarch *
1721{
1722 struct gdbarch *gdbarch;
1723
1724 /* Find a candidate among extant architectures. */
1726 if (arches != NULL)
1727 return arches->gdbarch;
1728
1730 gdbarch = gdbarch_alloc (&info, tdep);
1731
1732 /* Lowest text address. This is used by heuristic_proc_start()
1733 to decide when to stop looking. */
1734 tdep->vm_min_address = (CORE_ADDR) 0x120000000LL;
1735
1736 tdep->dynamic_sigtramp_offset = NULL;
1737 tdep->sigcontext_addr = NULL;
1738 tdep->sc_pc_offset = 2 * 8;
1739 tdep->sc_regs_offset = 4 * 8;
1740 tdep->sc_fpregs_offset = tdep->sc_regs_offset + 32 * 8 + 8;
1741
1742 tdep->jb_pc = -1; /* longjmp support not enabled by default. */
1743
1745
1746 /* Type sizes */
1757
1758 /* Register info */
1763
1766
1769
1773
1775
1776 /* Prologue heuristics. */
1778
1779 /* Call info. */
1780
1782
1783 /* Settings for calling functions in the inferior. */
1785
1788
1790 alpha_breakpoint::kind_from_pc);
1792 alpha_breakpoint::bp_from_kind);
1795
1796 /* Handles single stepping of atomic sequences. */
1798
1799 /* Hook in ABI-specific overrides, if they have been registered. */
1801
1802 /* Now that we have tuned the configuration, set a few final things
1803 based on what the OS ABI has told us. */
1804
1805 if (tdep->jb_pc >= 0)
1807
1810
1812
1813 return gdbarch;
1814}
1815
1816void
1818{
1821}
1822
1824void
1826{
1827
1828 gdbarch_register (bfd_arch_alpha, alpha_gdbarch_init, NULL);
1829
1830 /* Let the user set the fence post for heuristic_proc_start. */
1831
1832 /* We really would like to have both "0" and "unlimited" work, but
1833 command.c doesn't deal with that. So make it a var_zinteger
1834 because the user can always use "999999" or some such for unlimited. */
1835 /* We need to throw away the frame cache when we set this, since it
1836 might change our ability to get backtraces. */
1837 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support,
1839Set the distance searched for the start of a function."), _("\
1840Show the distance searched for the start of a function."), _("\
1841If you are debugging a stripped executable, GDB needs to search through the\n\
1842program for the start of a function. This command sets the distance of the\n\
1843search. The only need to set it is when debugging a stripped executable."),
1845 NULL, /* FIXME: i18n: The distance searched for
1846 the start of a function is \"%d\". */
1847 &setlist, &showlist);
1848}
int regnum
Definition: aarch64-tdep.c:68
const char *const name
Definition: aarch64-tdep.c:67
int code
Definition: ada-lex.l:688
gdb_static_assert(sizeof(splay_tree_key) >=sizeof(CORE_ADDR *))
unsigned int alpha_read_insn(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:671
static int alpha_sigtramp_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:981
static int alpha_register_reggroup_p(struct gdbarch *gdbarch, int regnum, const struct reggroup *group)
Definition: alpha-tdep.c:138
#define OPR_LIT(insn)
Definition: alpha-tdep.c:73
void alpha_supply_int_regs(struct regcache *regcache, int regno, const void *r0_r30, const void *pc, const void *unique)
Definition: alpha-tdep.c:1472
void alpha_supply_fp_regs(struct regcache *regcache, int regno, const void *f0_f30, const void *fpcr)
Definition: alpha-tdep.c:1515
#define OPR_RC(insn)
Definition: alpha-tdep.c:72
static const int bne_opcode
Definition: alpha-tdep.c:66
static struct value * alpha_sigtramp_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition: alpha-tdep.c:957
static CORE_ADDR alpha_heuristic_proc_start(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:1034
void alpha_dwarf2_init_abi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: alpha-tdep.c:1817
static void alpha_sts(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:212
static const struct frame_base alpha_heuristic_frame_base
Definition: alpha-tdep.c:1450
static const int ldl_l_opcode
Definition: alpha-tdep.c:751
static struct alpha_heuristic_unwind_cache * alpha_heuristic_frame_unwind_cache(frame_info_ptr this_frame, void **this_prologue_cache, CORE_ADDR start_pc)
Definition: alpha-tdep.c:1224
static struct value * alpha_heuristic_frame_prev_register(frame_info_ptr this_frame, void **this_prologue_cache, int regnum)
Definition: alpha-tdep.c:1414
void alpha_fill_fp_regs(const struct regcache *regcache, int regno, void *f0_f30, void *fpcr)
Definition: alpha-tdep.c:1530
static void alpha_value_to_register(frame_info_ptr frame, int regnum, struct type *valtype, const gdb_byte *in)
Definition: alpha-tdep.c:264
static void alpha_heuristic_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: alpha-tdep.c:1401
static const int lda_opcode
Definition: alpha-tdep.c:59
static int alpha_convert_register_p(struct gdbarch *gdbarch, int regno, struct type *type)
Definition: alpha-tdep.c:229
#define OPR_RA(insn)
Definition: alpha-tdep.c:71
constexpr gdb_byte alpha_break_insn[]
Definition: alpha-tdep.c:642
#define OPR_FUNCTION(insn)
Definition: alpha-tdep.c:69
static CORE_ADDR alpha_skip_prologue(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:691
static CORE_ADDR alpha_heuristic_frame_base_address(frame_info_ptr this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:1441
static const int stq_opcode
Definition: alpha-tdep.c:60
static struct type * alpha_register_type(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:120
static void alpha_extract_return_value(struct type *valtype, struct regcache *regcache, gdb_byte *valbuf)
Definition: alpha-tdep.c:469
static CORE_ADDR alpha_next_pc(struct regcache *regcache, CORE_ADDR pc)
Definition: alpha-tdep.c:1575
#define MEM_DISP(insn)
Definition: alpha-tdep.c:56
static int fp_register_zero_p(LONGEST reg)
Definition: alpha-tdep.c:1550
#define INSN_OPCODE(insn)
Definition: alpha-tdep.c:51
static void alpha_sigtramp_frame_this_id(frame_info_ptr this_frame, void **this_prologue_cache, struct frame_id *this_id)
Definition: alpha-tdep.c:915
void alpha_fill_int_regs(const struct regcache *regcache, int regno, void *r0_r30, void *pc, void *unique)
Definition: alpha-tdep.c:1497
static const char * alpha_register_name(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:87
static CORE_ADDR alpha_sigtramp_register_address(struct gdbarch *gdbarch, CORE_ADDR sigcontext_addr, int regnum)
Definition: alpha-tdep.c:896
void _initialize_alpha_tdep()
Definition: alpha-tdep.c:1825
static const struct frame_unwind alpha_sigtramp_frame_unwind
Definition: alpha-tdep.c:1010
#define MEM_RB(insn)
Definition: alpha-tdep.c:55
static int alpha_get_longjmp_target(frame_info_ptr frame, CORE_ADDR *pc)
Definition: alpha-tdep.c:843
static const int ldq_l_opcode
Definition: alpha-tdep.c:752
static void alpha_store_return_value(struct type *valtype, struct regcache *regcache, const gdb_byte *valbuf)
Definition: alpha-tdep.c:536
std::vector< CORE_ADDR > alpha_software_single_step(struct regcache *regcache)
Definition: alpha-tdep.c:1696
static CORE_ADDR alpha_push_dummy_call(struct gdbarch *gdbarch, struct value *function, struct regcache *regcache, CORE_ADDR bp_addr, int nargs, struct value **args, CORE_ADDR sp, function_call_return_method return_method, CORE_ADDR struct_addr)
Definition: alpha-tdep.c:291
static const int subq_function
Definition: alpha-tdep.c:76
static int alpha_return_in_memory_always(struct type *type)
Definition: alpha-tdep.c:636
static int fp_register_sign_bit(LONGEST reg)
Definition: alpha-tdep.c:1562
static struct alpha_sigtramp_unwind_cache * alpha_sigtramp_frame_unwind_cache(frame_info_ptr this_frame, void **this_prologue_cache)
Definition: alpha-tdep.c:874
static int alpha_register_to_value(frame_info_ptr frame, int regnum, struct type *valtype, gdb_byte *out, int *optimizedp, int *unavailablep)
Definition: alpha-tdep.c:237
#define MEM_RA(insn)
Definition: alpha-tdep.c:54
static const int stl_c_opcode
Definition: alpha-tdep.c:753
static const int br_opcode
Definition: alpha-tdep.c:65
#define OPR_HAS_IMMEDIATE(insn)
Definition: alpha-tdep.c:70
static int heuristic_fence_post
Definition: alpha-tdep.c:1026
static int alpha_cannot_store_register(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:113
static const int stq_c_opcode
Definition: alpha-tdep.c:754
static const int subq_opcode
Definition: alpha-tdep.c:75
static void reinit_frame_cache_sfunc(const char *args, int from_tty, struct cmd_list_element *c)
Definition: alpha-tdep.c:1461
static int alpha_cannot_fetch_register(struct gdbarch *gdbarch, int regno)
Definition: alpha-tdep.c:107
static void alpha_lds(struct gdbarch *gdbarch, void *out, const void *in)
Definition: alpha-tdep.c:181
static const struct frame_unwind alpha_heuristic_frame_unwind
Definition: alpha-tdep.c:1429
static std::vector< CORE_ADDR > alpha_deal_with_atomic_sequence(struct gdbarch *gdbarch, CORE_ADDR pc)
Definition: alpha-tdep.c:762
static enum return_value_convention alpha_return_value(struct gdbarch *gdbarch, struct value *function, struct type *type, struct regcache *regcache, gdb_byte *readbuf, const gdb_byte *writebuf)
Definition: alpha-tdep.c:605
static void alpha_heuristic_analyze_probing_loop(struct gdbarch *gdbarch, CORE_ADDR *pc, int *frame_size)
Definition: alpha-tdep.c:1127
static struct gdbarch * alpha_gdbarch_init(struct gdbarch_info info, struct gdbarch_list *arches)
Definition: alpha-tdep.c:1720
#define ALPHA_PC_REGNUM
Definition: alpha-tdep.h:52
#define ALPHA_UNIQUE_REGNUM
Definition: alpha-tdep.h:53
#define ALPHA_FPA0_REGNUM
Definition: alpha-tdep.h:50
#define ALPHA_REGISTER_SIZE
Definition: alpha-tdep.h:29
#define ALPHA_SP_REGNUM
Definition: alpha-tdep.h:47
#define ALPHA_A0_REGNUM
Definition: alpha-tdep.h:42
#define ALPHA_GP_REGNUM
Definition: alpha-tdep.h:46
#define ALPHA_V0_REGNUM
Definition: alpha-tdep.h:38
#define ALPHA_NUM_REGS
Definition: alpha-tdep.h:32
#define ALPHA_FP0_REGNUM
Definition: alpha-tdep.h:49
#define ALPHA_INSN_SIZE
Definition: alpha-tdep.h:56
#define ALPHA_T9_REGNUM
Definition: alpha-tdep.h:43
#define ALPHA_T12_REGNUM
Definition: alpha-tdep.h:45
#define ALPHA_NUM_ARG_REGS
Definition: alpha-tdep.h:70
CORE_ADDR alpha_after_prologue(CORE_ADDR pc)
#define ALPHA_T7_REGNUM
Definition: alpha-tdep.h:39
#define ALPHA_RA_REGNUM
Definition: alpha-tdep.h:44
#define ALPHA_FPCR_REGNUM
Definition: alpha-tdep.h:51
#define ALPHA_GCC_FP_REGNUM
Definition: alpha-tdep.h:41
#define ALPHA_ZERO_REGNUM
Definition: alpha-tdep.h:48
static std::vector< const char * > arches
Definition: arch-utils.c:685
void gdbarch_register(enum bfd_architecture bfd_architecture, gdbarch_init_ftype *init, gdbarch_dump_tdep_ftype *dump_tdep)
Definition: arch-utils.c:1256
int core_addr_lessthan(CORE_ADDR lhs, CORE_ADDR rhs)
Definition: arch-utils.c:177
struct gdbarch_list * gdbarch_list_lookup_by_info(struct gdbarch_list *arches, const struct gdbarch_info *info)
Definition: arch-utils.c:1298
#define BP_MANIPULATION(BREAK_INSN)
Definition: arch-utils.h:70
bool find_pc_partial_function(CORE_ADDR pc, const char **name, CORE_ADDR *address, CORE_ADDR *endaddr, const struct block **block)
Definition: blockframe.c:373
CORE_ADDR get_pc_function_start(CORE_ADDR pc)
Definition: blockframe.c:86
enum register_status cooked_read(int regnum, gdb_byte *buf)
Definition: regcache.c:692
gdbarch * arch() const
Definition: regcache.c:230
void raw_collect(int regnum, void *buf) const override
Definition: regcache.c:1118
void raw_supply(int regnum, const void *buf) override
Definition: regcache.c:1053
void cooked_write(int regnum, const gdb_byte *buf)
Definition: regcache.c:861
struct cmd_list_element * showlist
Definition: cli-cmds.c:125
struct cmd_list_element * setlist
Definition: cli-cmds.c:117
set_show_commands add_setshow_zinteger_cmd(const char *name, enum command_class theclass, int *var, const char *set_doc, const char *show_doc, const char *help_doc, cmd_func_ftype *set_func, show_value_ftype *show_func, struct cmd_list_element **set_list, struct cmd_list_element **show_list)
Definition: cli-decode.c:1103
@ class_support
Definition: command.h:58
void write_memory(CORE_ADDR memaddr, const bfd_byte *myaddr, ssize_t len)
Definition: corefile.c:346
void read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: corefile.c:237
void memory_error(enum target_xfer_status err, CORE_ADDR memaddr)
Definition: corefile.c:185
static void store_unsigned_integer(gdb_byte *addr, int len, enum bfd_endian byte_order, ULONGEST val)
Definition: defs.h:561
static ULONGEST extract_unsigned_integer(gdb::array_view< const gdb_byte > buf, enum bfd_endian byte_order)
Definition: defs.h:526
return_value_convention
Definition: defs.h:258
@ RETURN_VALUE_ABI_RETURNS_ADDRESS
Definition: defs.h:274
@ RETURN_VALUE_REGISTER_CONVENTION
Definition: defs.h:261
void dwarf2_append_unwinders(struct gdbarch *gdbarch)
Definition: frame.c:1361
const struct frame_base * dwarf2_frame_base_sniffer(frame_info_ptr this_frame)
Definition: frame.c:1392
void frame_base_append_sniffer(struct gdbarch *gdbarch, frame_base_sniffer_ftype *sniffer)
Definition: frame-base.c:81
void frame_base_set_default(struct gdbarch *gdbarch, const struct frame_base *default_base)
Definition: frame-base.c:93
int default_frame_sniffer(const struct frame_unwind *self, frame_info_ptr this_frame, void **this_prologue_cache)
Definition: frame-unwind.c:217
struct value * frame_unwind_got_memory(frame_info_ptr frame, int regnum, CORE_ADDR addr)
Definition: frame-unwind.c:286
struct value * frame_unwind_got_register(frame_info_ptr frame, int regnum, int new_regnum)
Definition: frame-unwind.c:276
enum unwind_stop_reason default_frame_unwind_stop_reason(frame_info_ptr this_frame, void **this_cache)
Definition: frame-unwind.c:227
void frame_unwind_append_unwinder(struct gdbarch *gdbarch, const struct frame_unwind *unwinder)
Definition: frame-unwind.c:107
struct value * get_frame_register_value(frame_info_ptr frame, int regnum)
Definition: frame.c:1285
ULONGEST get_frame_register_unsigned(frame_info_ptr frame, int regnum)
Definition: frame.c:1351
CORE_ADDR get_frame_pc(frame_info_ptr frame)
Definition: frame.c:2592
void reinit_frame_cache(void)
Definition: frame.c:2006
struct frame_id frame_id_build(CORE_ADDR stack_addr, CORE_ADDR code_addr)
Definition: frame.c:713
struct gdbarch * get_frame_arch(frame_info_ptr this_frame)
Definition: frame.c:2907
ULONGEST get_frame_memory_unsigned(frame_info_ptr this_frame, CORE_ADDR addr, int len)
Definition: frame.c:2887
CORE_ADDR get_frame_func(frame_info_ptr this_frame)
Definition: frame.c:1050
void put_frame_register(frame_info_ptr frame, int regnum, const gdb_byte *buf)
Definition: frame.c:1378
@ SIGTRAMP_FRAME
Definition: frame.h:190
@ NORMAL_FRAME
Definition: frame.h:179
#define FRAME_OBSTACK_ZALLOC(TYPE)
Definition: frame.h:608
void set_gdbarch_long_long_bit(struct gdbarch *gdbarch, int long_long_bit)
Definition: gdbarch.c:1467
void set_gdbarch_register_to_value(struct gdbarch *gdbarch, gdbarch_register_to_value_ftype *register_to_value)
enum bfd_endian gdbarch_byte_order(struct gdbarch *gdbarch)
Definition: gdbarch.c:1370
void set_gdbarch_value_to_register(struct gdbarch *gdbarch, gdbarch_value_to_register_ftype *value_to_register)
void set_gdbarch_breakpoint_kind_from_pc(struct gdbarch *gdbarch, gdbarch_breakpoint_kind_from_pc_ftype *breakpoint_kind_from_pc)
const char * gdbarch_register_name(struct gdbarch *gdbarch, int regnr)
Definition: gdbarch.c:2142
void set_gdbarch_software_single_step(struct gdbarch *gdbarch, gdbarch_software_single_step_ftype *software_single_step)
void set_gdbarch_get_longjmp_target(struct gdbarch *gdbarch, gdbarch_get_longjmp_target_ftype *get_longjmp_target)
void set_gdbarch_skip_prologue(struct gdbarch *gdbarch, gdbarch_skip_prologue_ftype *skip_prologue)
void set_gdbarch_wchar_bit(struct gdbarch *gdbarch, int wchar_bit)
Definition: gdbarch.c:1649
void set_gdbarch_register_name(struct gdbarch *gdbarch, gdbarch_register_name_ftype *register_name)
void set_gdbarch_int_bit(struct gdbarch *gdbarch, int int_bit)
Definition: gdbarch.c:1433
void set_gdbarch_skip_trampoline_code(struct gdbarch *gdbarch, gdbarch_skip_trampoline_code_ftype *skip_trampoline_code)
void set_gdbarch_return_value(struct gdbarch *gdbarch, gdbarch_return_value_ftype *return_value)
void set_gdbarch_decr_pc_after_break(struct gdbarch *gdbarch, CORE_ADDR decr_pc_after_break)
Definition: gdbarch.c:2848
void set_gdbarch_wchar_signed(struct gdbarch *gdbarch, int wchar_signed)
Definition: gdbarch.c:1667
void set_gdbarch_fp0_regnum(struct gdbarch *gdbarch, int fp0_regnum)
Definition: gdbarch.c:2067
void set_gdbarch_double_bit(struct gdbarch *gdbarch, int double_bit)
Definition: gdbarch.c:1583
void set_gdbarch_inner_than(struct gdbarch *gdbarch, gdbarch_inner_than_ftype *inner_than)
void set_gdbarch_cannot_step_breakpoint(struct gdbarch *gdbarch, int cannot_step_breakpoint)
Definition: gdbarch.c:3491
void set_gdbarch_sp_regnum(struct gdbarch *gdbarch, int sp_regnum)
Definition: gdbarch.c:2016
void set_gdbarch_register_reggroup_p(struct gdbarch *gdbarch, gdbarch_register_reggroup_p_ftype *register_reggroup_p)
void set_gdbarch_pc_regnum(struct gdbarch *gdbarch, int pc_regnum)
Definition: gdbarch.c:2033
void set_gdbarch_register_type(struct gdbarch *gdbarch, gdbarch_register_type_ftype *register_type)
void set_gdbarch_float_bit(struct gdbarch *gdbarch, int float_bit)
Definition: gdbarch.c:1550
void set_gdbarch_short_bit(struct gdbarch *gdbarch, int short_bit)
Definition: gdbarch.c:1416
void set_gdbarch_long_bit(struct gdbarch *gdbarch, int long_bit)
Definition: gdbarch.c:1450
void set_gdbarch_ptr_bit(struct gdbarch *gdbarch, int ptr_bit)
Definition: gdbarch.c:1701
void set_gdbarch_convert_register_p(struct gdbarch *gdbarch, gdbarch_convert_register_p_ftype *convert_register_p)
int gdbarch_fp0_regnum(struct gdbarch *gdbarch)
Definition: gdbarch.c:2057
void set_gdbarch_cannot_store_register(struct gdbarch *gdbarch, gdbarch_cannot_store_register_ftype *cannot_store_register)
void set_gdbarch_cannot_fetch_register(struct gdbarch *gdbarch, gdbarch_cannot_fetch_register_ftype *cannot_fetch_register)
void set_gdbarch_num_regs(struct gdbarch *gdbarch, int num_regs)
Definition: gdbarch.c:1910
void set_gdbarch_long_double_bit(struct gdbarch *gdbarch, int long_double_bit)
Definition: gdbarch.c:1616
void set_gdbarch_sw_breakpoint_from_kind(struct gdbarch *gdbarch, gdbarch_sw_breakpoint_from_kind_ftype *sw_breakpoint_from_kind)
void set_gdbarch_push_dummy_call(struct gdbarch *gdbarch, gdbarch_push_dummy_call_ftype *push_dummy_call)
struct gdbarch * gdbarch_alloc(const struct gdbarch_info *info, struct gdbarch_tdep_base *tdep)
Definition: gdbarch.c:264
function_call_return_method
Definition: gdbarch.h:112
@ return_method_struct
Definition: gdbarch.h:124
struct type * lookup_pointer_type(struct type *type)
Definition: gdbtypes.c:402
struct type * check_typedef(struct type *type)
Definition: gdbtypes.c:3010
type_code
Definition: gdbtypes.h:99
CORE_ADDR find_function_addr(struct value *function, struct type **retval_type, struct type **function_type)
Definition: infcall.c:277
struct inferior * current_inferior(void)
Definition: inferior.c:54
@ NO_STOP_QUIETLY
Definition: inferior.h:299
CORE_ADDR find_solib_trampoline_target(frame_info_ptr frame, CORE_ADDR pc)
Definition: minsyms.c:1534
def info(c)
Definition: gdbarch.py:184
void gdbarch_init_osabi(struct gdbarch_info info, struct gdbarch *gdbarch)
Definition: osabi.c:382
CORE_ADDR regcache_read_pc(struct regcache *regcache)
Definition: regcache.c:1324
enum register_status regcache_raw_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:643
int register_size(struct gdbarch *gdbarch, int regnum)
Definition: regcache.c:170
void regcache_cooked_write_signed(struct regcache *regcache, int regnum, LONGEST val)
Definition: regcache.c:798
enum register_status regcache_cooked_read_unsigned(struct regcache *regcache, int regnum, ULONGEST *val)
Definition: regcache.c:790
LONGEST regcache_raw_get_signed(struct regcache *regcache, int regnum)
Definition: regcache.c:679
void regcache_cooked_write_unsigned(struct regcache *regcache, int regnum, ULONGEST val)
Definition: regcache.c:819
const reggroup *const general_reggroup
Definition: reggroups.c:251
const reggroup *const system_reggroup
Definition: reggroups.c:253
const reggroup *const float_reggroup
Definition: reggroups.c:252
const reggroup *const save_reggroup
Definition: reggroups.c:256
const reggroup *const all_reggroup
Definition: reggroups.c:255
const reggroup *const restore_reggroup
Definition: reggroups.c:257
void(* func)(remote_target *remote, char *)
CORE_ADDR(* sigcontext_addr)(frame_info_ptr)
Definition: alpha-tdep.h:84
int(* pc_in_sigtramp)(struct gdbarch *gdbarch, CORE_ADDR pc, const char *name)
Definition: alpha-tdep.h:90
LONGEST(* dynamic_sigtramp_offset)(struct gdbarch *, CORE_ADDR)
Definition: alpha-tdep.h:80
int(* return_in_memory)(struct type *type)
Definition: alpha-tdep.h:94
CORE_ADDR vm_min_address
Definition: alpha-tdep.h:75
trad_frame_saved_reg * saved_regs
Definition: alpha-tdep.c:1118
struct type * builtin_double
Definition: gdbtypes.h:2258
struct type * builtin_func_ptr
Definition: gdbtypes.h:2314
struct type * builtin_data_ptr
Definition: gdbtypes.h:2303
struct type * builtin_int64
Definition: gdbtypes.h:2289
struct type * builtin_int32
Definition: gdbtypes.h:2287
Definition: gnu-nat.c:154
CORE_ADDR pc
Definition: symtab.h:2272
CORE_ADDR end
Definition: symtab.h:2273
Definition: gdbtypes.h:922
type_code code() const
Definition: gdbtypes.h:927
ULONGEST length() const
Definition: gdbtypes.h:954
Definition: value.c:181
struct symtab_and_line find_pc_line(CORE_ADDR pc, int notcurrent)
Definition: symtab.c:3297
int target_read_memory(CORE_ADDR memaddr, gdb_byte *myaddr, ssize_t len)
Definition: target.c:1771
@ TARGET_XFER_E_IO
Definition: target.h:227
trad_frame_saved_reg * trad_frame_alloc_saved_regs(struct gdbarch *gdbarch)
Definition: trad-frame.c:62
struct value * trad_frame_get_prev_register(frame_info_ptr this_frame, trad_frame_saved_reg this_saved_regs[], int regnum)
Definition: trad-frame.c:187
const char * paddress(struct gdbarch *gdbarch, CORE_ADDR addr)
Definition: utils.c:3114
void gdb_printf(struct ui_file *stream, const char *format,...)
Definition: utils.c:1865
struct value * value_cast(struct type *type, struct value *arg2)
Definition: valops.c:408
struct type * value_type(const struct value *value)
Definition: value.c:1109
int value_entirely_available(struct value *value)
Definition: value.c:408
gdb::array_view< const gdb_byte > value_contents_all(struct value *value)
Definition: value.c:1284
gdb::array_view< const gdb_byte > value_contents(struct value *value)
Definition: value.c:1464
int value_optimized_out(struct value *value)
Definition: value.c:1481
struct value * value_from_pointer(struct type *type, CORE_ADDR addr)
Definition: value.c:3651
value_ref_ptr release_value(struct value *val)
Definition: value.c:1714
LONGEST unpack_long(struct type *type, const gdb_byte *valaddr)
Definition: value.c:2921