Intel Quartus Prime
From the Intel Quartus Prime overview:
- The revolutionary Intel® Quartus® Prime Design Software includes everything you need to design for Intel® FPGAs, SoCs, and complex programmable logic device (CPLD) from design entry and synthesis to optimization, verification, and simulation.
This article focuses on the following Intel FPGA software components:
- Quartus Prime Lite
- Intel FPGA Download Cable (II)
- ModelSim-Intel FPGA (Starter) Edition — included with Quartus Prime Lite Edition
- Intel Quartus Prime was previously called Altera Quartus Prime.
- Intel FPGA Download Cable was formerly known as USB-Blaster.
Installation
Install the quartus-freeAUR meta-package to install the latest version of Quartus Prime Lite and ModelSim, also available in the chaotic-aur repository [1]. This meta-package will also install device support for every supported device family. A minimal installation can be achieved by installing only the necessary components. For example:
- quartus-free-quartusAUR for Quartus Prime Lite
- quartus-free-modelsimAUR for ModelSim
quartus-free-quartus requires quartus-free-devinfo, which is provided by any one of the packages with a quartus-free-devinfo- prefix. For example, install the quartus-free-devinfo-cyclonevAUR dependency if you have a Cyclone V FPGA.
quartus-free-quartus and quartus-free-modelsim use files in /etc/profile.d/
to extend the PATH
environment variable, so log into a new session to make commands like quartus_sh and vsim available.
You need to be in the plugdev
group to program an FPGA (via the USB-Blaster).
Usage
Run Quartus Prime Lite by running quartus
or selecting its desktop entry. Use the quartus_sh utility to run Quartus Prime Shell. See quartus_sh --help
for more information.
Run ModelSim by running vsim
or selecting its desktop entry. See vsim -help
for more information.
Standard Edition license validation
Configuring the path to your Quartus Prime Standard Edition license file from the Quartus Prime settings interface is not enough for successful license validation. The license validation routine looks for your MAC address on device eth0
. This was the legacy name for your ethernet controller; now systemd dynamically allocates a name to your device on boot—this can be different from machine to machine. We need to rename that device back to the expected eth0
.
Create a new udev rule (where MAC_address
is licensed networking device's MAC address):
/etc/udev/rules.d/10-network.rules
SUBSYSTEM=="net", ACTION=="add", ATTR{address}=="MAC_address", NAME="eth0"
Then, reload the new rule.
Alternatively, a dummy eth0
network interface can be dynamically created by systemd-networkd.service
at boot. Create the following file (where hostname
is your machine's hostname):
/etc/systemd/network/25-dummy.netdev
[Match] Host=hostname [NetDev] Name=eth0 Kind=dummy MACAddress=MAC_address
Ensure systemd-networkd.service
is started/enabled afterwards.
Troubleshooting
Empty greyish windows (XMonad)
Some of the built-in editors in Quartus Prime such as IP editors and Tools > Platform Designer (aka Qsys) only show a blank window with XMonad. A workaround is to change the window manager's name. See also XMonad.Hooks.SetWMName documentation and Xmonad#Problems with Java applications.
USB-Blaster not working
Run jtagconfig
and depending on the output:
No JTAG hardware available
If the device is listed by lsusb
, restart jtagd
as root [2]:
# killall -9 jtagd # jtagd
JTAG chain broken
1) USB-Blaster [3-2] Unable to read device chain - JTAG chain broken
Perform the steps under the "Linux" section in https://ecen3350.rocks/static/usb-blaster.pdf. Note that the Arch Linux path to quartus/bin
in step 3 should be as follows:
/opt/intelFPGA/PKGBUILD_mainver/quartus/bin
Steps 3 and 5 should also be performed with root privileges.
Another possible cause may be a missing 32-bit version of libudev.so
[3]. lib32-systemd provides this shared object, so make sure it is installed. (This should already be the case since it is a transitive dependency of quartus-free-quartusAUR.)
Error when scanning hardware - Server error
Connecting to server(s) [........ ] Error when scanning hardware - Server error
A workaround is to edit /etc/jtagd.conf
or ~/.jtagd.conf
(depending on whether you want to run jtagd
as root or as an unprivileged user) to include the following line:
Password = "changeme";
Add the server afterwards:
$ jtagconfig --addserver 127.0.0.1 changeme
If problems still persist, try restarting jtagd
:
# killall -9 jtagd $ jtagd
Eclipse IDE for Nios II is slow or unresponsive
Try disabling GTK 3 in eclipse.ini. The eclipse.ini
file path for Nios II may vary; one possibility on Arch Linux is as follows [4]:
/opt/intelFPGA/PKGBUILD_mainver/nios2eds/bin/eclipse_nios2/eclipse.ini
ModelSim
Failure to access library 'work'
The following error may be encountered when running a simulation in a new directory:
Error: (vcom-19) Failed to access library 'work' at "work".
This can be resolved by creating the work
directory from the ModelSim console [5]:
ModelSim> vlib work
Unreachable host
ModelSim may crash with the following error when trying to start a simulation:
Error: couldn't open socket: host is unreachable Trouble making server.
This can be resolved by adding hosts(5) entries for localhost
as specified in Network configuration#Local hostname resolution.